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闁辫畝锛�640
椤炲垾锛氶泦鎴愰浕璺� (IC)
瀹跺涵锛氬祵鍏ュ紡 - FPGA锛堢従(xi脿n)鍫村彲绶ㄧ▼闁�闄ｅ垪锛�
椤炲垾锛氶泦鎴愰浕璺� (IC)
瀹跺涵锛氬祵鍏ュ紡 - FPGA锛堢従(xi脿n)鍫村彲绶ㄧ▼闁�闄ｅ垪锛�
绯诲垪锛歏irtex-5 LX
杓稿叆/杓稿嚭鏁�(sh霉)锛�400
閭忚集濉�/鍏冧欢鏁�(sh霉)锛�30720
闁�鏁�(sh霉)锛�-
闆绘簮闆诲锛�1.14 V ~ 3.45 V
瀹夎椤炲瀷锛氳〃闈㈣布瑁�
宸ヤ綔婧害锛�0掳C ~ 85掳C
灏佽/澶栨锛�676-FCBGA
渚涙噳鍟嗚ō鍌欏皝瑁濓細*
鍏跺畠鍚嶇ū锛�122-1559
浜斿�嬪钩鑷篖X锛孡XT锛孲XT锛孴XT鍜孎XT
Virtex-5 LX锛氶珮鎬ц兘閫氱敤閭忚集鎳夌敤
Virtex-5 LXT锛氬叿鏈夐珮绱氫覆琛岄�ｆ帴鐨勯珮鎬ц兘閭忚集
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闆�5-LUT閬搁爡
鏀归�茬殑娓涘皯韬嶉粸璺敱
64浣嶅垎甯冨紡RAM閬搁爡
SRL32 / Dual SRL16閬搁爡
寮峰ぇ鐨勬檪閻樼鐞嗙璨�(CMT)鏅傞悩
鏁�(sh霉)瀛楁檪閻樼鐞嗗櫒(DCM)妯″鐢ㄤ簬闆跺欢閬茬珐娌�锛岄牷鐜囧悎鎴愬拰鏅傞悩鐩哥Щ
PLL妯″锛岀敤浜庤几鍏ユ姈鍕曟烤娉�锛岄浂寤堕伈绶╂矕锛岄牷鐜囧悎鎴愬拰鐩镐綅鍖归厤鏅傞悩鍒嗛牷
36 Kb濉奟AM / FIFO
鐪熸鐨勯洐绔彛RAM濉�
澧炲挤鐨勫彲閬稿彲绶ㄧ▼FIFO閭忚集
鍙法绋嬬殑
鐪熸鐨勯洐绔彛瀵害楂橀仈x36
绨″柈鐨勯洐绔彛瀵害楂橀仈x72
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(鍙伕)灏囨瘡鍊嬪绶ㄧ▼鐐哄叐鍊嬬崹绔嬬殑18-Kbit濉�
楂樻�ц兘骞惰SelectIO鎶�琛�
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楂橀�熷瓨鍎插櫒鎺ュ彛鏀寔
鍏堥�茬殑DSP48E Slice
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SPI鍜屽苟琛孎LASH鎺ュ彛
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LXT锛孲XT锛孴XT鍜孎XT骞宠嚭
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姣忓x1锛寈4鎴杧8閫氶亾鏀寔
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涓夋ā10/100/1000 Mb / s浠ュお缍�(w菐ng)MAC
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RocketIO GTP鏀剁櫦(f膩)鍣�100 Mb / s鑷�3.75 Gb / s
LXT鍜孲XT骞宠嚭
RocketIO GTX鏀剁櫦(f膩)鍣�150 Mb / s鑷�6.5 Gb / s
TXT鍜孎XT骞宠嚭
PowerPC 440寰檿鐞嗗櫒
鍍匜XT骞宠嚭
RISC鏋舵
7绱氭祦姘寸窔
鍖呮嫭32 KB鐨勬寚浠ゅ拰鏁�(sh霉)鎿�(j霉)绶╁瓨
鍎�(y艒u)鍖栫殑铏曠悊鍣ㄦ帴鍙ｇ祼妲�(浜ゅ弶闁嬮棞)
65绱嶇背閵匔MOS宸ヨ棟鎶�琛�
1.0V鏍稿績闆诲
楂樹俊铏熷畬鏁存�у�掕鑺墖灏佽锛屾彁渚涙婧栨垨鐒￠墰灏佽閬搁爡
鍙法绋嬮倧杓鍨� | 鐝�(xi脿n)鍫村彲绶ㄧ▼闁�闄ｅ垪 |
绗﹀悎REACH | 鏄� |
绗﹀悎姝愮洘RoHS | 鏄� |
鐙�鎱�(t脿i) | 娲绘�� |
鏈�澶ф檪閻橀牷鐜� | 1098.0鍏嗚但 |
JESD-30浠ｇ⒓ | S-PBGA-B676 |
JESD-609浠ｇ⒓ | E1 |
绺絉AM浣� | 1179648 |
CLB鏁�(sh霉)閲� | 2400.0 |
杓稿叆鏁�(sh霉)閲� | 400.0 |
閭忚集鍠厓鏁�(sh霉) | 30720.0 |
杓稿嚭鏁�(sh霉)閲� | 400.0 |
绔瓙鏁�(sh霉) | 676 |
鏈�浣庡伐浣滄韩搴� | 0鈩� |
鏈�楂樺伐浣滄韩搴� | 85鈩� |
绲勭箶 | 2400 CLBS |
宄板�煎洖娴佹韩搴�(鈩�) | 245 |
闆绘簮 | 1,2.5 |
璩囨牸鐙�鎱�(t脿i) | 涓嶅悎鏍� |
搴ч珮 | 3.0姣背 |
瀛愰鍒� | 鐝�(xi脿n)鍫村彲绶ㄧ▼闁�闄ｅ垪 |
闆绘簮闆诲妯欑ū | 1.0浼� |
鏈�灏忎緵闆婚浕澹� | 0.95浼� |
鏈�澶ч浕婧愰浕澹� | 1.05浼� |
瀹夎椤炲瀷 | 琛ㄩ潰璨艰 |
鎶�琛� | CMOS |
婧害绛夌礆 | 鍏朵粬 |
绲傜瀹屾垚 | 閷�/閵�/閵�(Sn95.5Ag4.0Cu0.5) |
绲傜琛ㄦ牸 | 鐞� |
绔瓙闁撹窛 | 1.0姣背 |
绲傜浣嶇疆 | 搴曢儴 |
鏅傞枔@宄板�煎洖娴佹韩搴︽渶澶у��(绉�) | 涓夊崄 |
闀峰害 | 27.0姣背 |
瀵害 | 27.0姣背 |
鍖呰涓婚珨鏉愭枡 | 濉戞枡/鐠�(hu谩n)姘фü鑴� |
鍖呰浠ｇ⒓ | BGA |
鍖呰绛夋晥浠ｇ⒓ | BGA676,26X26,40 |
鍖呰褰㈢媭 | 寤ｅ牬 |
鍖呰褰㈠紡 | 缍�(w菐ng)鏍奸櫍鍒� |
鍒堕�犲晢鍖呰瑾槑 | 27 X 27 MM锛岀劇閴�锛孎(xi脿n)BGA-676 |
