XC5VLX155T-1FF1136C 鏅傞枔锛�2022/10/20 16:55:09 闁辫畝锛�970

鐢�(ch菐n)鍝佸瀷铏�	XC5VLX155T-1FF1136C
鎻忚堪	IC FPGA 640 I/O 1136FCBGA
鍒嗛	闆嗘垚闆昏矾(IC)锛屽祵鍏ュ紡FPGA(鐝�(xi脿n)鍫村彲绶ㄧ▼闁€闄ｅ垪)

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鐢�(ch菐n)鍝佸瀷铏�	XC5VLX155T-1FF1136C
鐢熺敘(ch菐n)寤犲	Xilinx鍏徃
鎻忚堪	IC FPGA 640 I/O 1136FCBGA
鍒嗛	闆嗘垚闆昏矾(IC)锛屽祵鍏ュ紡FPGA(鐝�(xi脿n)鍫村彲绶ㄧ▼闁€闄ｅ垪)
绯诲垪	Virtex?-5 LXT
閮ㄥ垎鐙€鎱�(t脿i)	娲绘€�
鍖�/绠�	1136-BBGA锛孎(xi脿n)CBGA
渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏寘	1136-FCBGA(35x35)
鍩虹(ch菙)閮ㄤ欢铏�	XC5VLX155T

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鍙法绋嬮倧杓鍨�	鐝�(xi脿n)鍫村彲绶ㄧ▼闁€闄ｅ垪
绗﹀悎REACH妯�(bi膩o)婧�(zh菙n)	鏄�
鐙€鎱�(t脿i)	娲绘€�
鏅傞悩闋荤巼-鏈€澶у€�	1098.0 MHz
JESD-30浠ｇ⒓	S-PBGA-B1136
JESD-609浠ｇ⒓	E0
CLB鏁�(sh霉)閲�	12160.0
杓稿叆鏁�(sh霉)閲�	640.0
閭忚集鍠厓鐨勬暩(sh霉)閲�	155648.0
杓稿嚭鏁�(sh霉)閲�	640.0
绲傜鏁�(sh霉)閲�	1136
瀹忚渹绐╂暩(sh霉)閲�	330000
閲濇暩(sh霉)	1153
RAM澶у皬	7077888b
閫熷害绛夌礆	1
宸ヤ綔婧害-鏈€灏忓€�	0鈩�
宸ヤ綔婧害-鏈€楂�	85 鈩�
宄板€煎洖娴佹韩搴�(鈩�)	225
闆绘簮	1,2.5
璩囨牸鐙€鎱�(t脿i)	涓嶅悎鏍�
鍧愬Э楂樺害-鏈€澶�	3.4姣背
瀛愰鍒�	鐝�(xi脿n)鍫村彲绶ㄧ▼闁€闄ｅ垪
闆绘簮闆诲	1.0 V
闆绘簮闆诲-鏈€灏忓€�	0.95 V
闆绘簮闆诲-鏈€澶у€�	1.05 V
瀹夎椤炲瀷	琛ㄩ潰璨艰
鎶€琛�(sh霉)	CMOS
婧害绛夌礆	鍏朵粬
绲傜瀹屾垚	閷�/閴�(Sn63Pb37)
绲傜琛ㄦ牸	鐞�
绲傜闁撹窛	1.0姣背
绲傜浣嶇疆	搴曢儴
鏅傞枔@宄板€煎洖娴佹韩搴�-鏈€澶у€�(s)	涓夊崄
闀峰害	35.0姣背
瀵害	35.0姣背
鍖呰楂旀潗鏂�	濉戞枡/鐠�(hu谩n)姘фü鑴�
鍖呰９浠ｇ⒓	BGA
鍖呯瓑鍍逛唬纰�	BGA1136,34X34,40
鍖呰褰㈢媭	寤ｅ牬
鍖呰棰�(f膿ng)鏍�	缍�(w菐ng)鏍奸櫍鍒�
鍖呰鏁�(sh霉)閲�	1
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鍒堕€犲晢鍖呰瑾槑	35脳35 MM锛孎(xi脿n)BGA-1136