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XC5VFX100T-2FFG1136I 鏄� Xilinx 鍏徃鎺ㄥ嚭鐨� Virtex-5 绯诲垪 FPGA 鑺墖涓殑涓�鍝�銆傝┎绯诲垪鑺墖閲囩敤鍏堥�茬殑 65nm 宸ヨ棟鍒堕��锛屾彁渚涗簡楂樺瘑搴﹂倧杓硣婧�銆侀珮閫熶覆琛屾敹鐧�(f膩)鍣ㄥ拰璞愬瘜鐨勫祵鍏ュ紡瀛樺劜鍣ㄥ绛夌壒鎬э紝閬╃敤浜庨珮鎬ц兘瑷堢畻銆侀�氫俊鍩虹瑷柦銆佷俊铏熻檿鐞嗗拰杌嶄簨鑸┖绛夐牁鍩�銆�
銆�銆�Virtex-5 绯诲垪 FPGA 鎻愪緵浜嗗绋灦妲嬮伕鎿囦互婊胯冻涓嶅悓鎳夌敤闇�姹�锛屽寘鎷� FX锛堥泦鎴� PowerPC 铏曠悊鍣ㄥ拰涓茶鏀剁櫦(f膩)鍣級銆丗XT锛堝鍔犳洿澶氬姛鑳芥ā濉婏級绛夎畩绋�銆俋C5VFX100T 灞簬 FX 绯诲垪锛屽叿鏈夎純澶х殑閭忚集瑕�(gu墨)妯″拰寮峰ぇ鐨勫瑷泦鎴愯兘鍔�銆�
鍨嬭櫉锛歑C5VFX100T-2FFG1136I
銆�銆�绯诲垪锛歏irtex-5 FX
銆�銆�宸ヨ棟锛�65nm
銆�銆�閰嶇疆妯″紡锛歁aster SPI
銆�銆�I/O 鏁搁噺锛�840
銆�銆�閭忚集鍠厓鏁搁噺锛�101,040
銆�銆�瀛樺劜鍣ㄥ閲忥細4,718 Kb
銆�銆�DSP Slice 鏁搁噺锛�960
銆�銆�涓茶鏀剁櫦(f膩)鍣ㄦ暩閲忥細24
銆�銆�涓茶鏀剁櫦(f膩)鍣ㄩ�熺巼锛�6.5 Gbps
銆�銆�鍏ф牳闆诲锛�1.0V
銆�銆�I/O 闆诲锛�1.8V/2.5V/3.3V
銆�銆�灏佽椤炲瀷锛欶FG1136
銆�銆�閫熷害绛夌礆锛�-2
1. XC5VFX100T-2FFG1136I 闆嗘垚浜� PowerPC 440 闆欐牳铏曠悊鍣紝鍙鐝惧京闆滅殑宓屽叆寮忚檿鐞嗕换鍕�銆�
銆�銆�2. 鎻愪緵澶氶仈 24 鍊� RocketIO 鏀剁櫦(f膩)鍣紝鏀寔楂橀仈 6.5 Gbps 鐨勬暩鎿氬偝杓搁�熺巼锛岄潪甯搁仼鍚堥珮閫熼�氫俊鎺ュ彛瑷▓銆�
銆�銆�3. 鍏х疆澶у閲� Block RAM 鍜屽垎甯冨紡 RAM锛屽彲浠ラ潏娲诲湴瀵︾従鍚勭ó瀛樺劜鍣ㄧ祼妲�銆�
銆�銆�4. DSP Slice 鐨勮睈瀵屾暩閲忎娇鍏剁壒鍒ラ仼鍚堟暩瀛椾俊铏熻檿鐞嗙畻娉曠殑纭欢鍔犻��銆�
銆�銆�5. 鏀寔澶氱ó閰嶇疆妯″紡锛屽寘鎷緸 SPI Flash 鍟熷嫊鐨� Master SPI 妯″紡锛岀啊鍖栦簡绯荤当(t菕ng)瑷▓銆�
銆�銆�6. 鎻愪緵澶氱祫 I/O Bank锛屾敮鎸佸绋婧栭浕骞�锛屼究浜庨�ｆ帴澶栭儴瑷倷鍜岄浕璺澘绱氳ō瑷堛��
銆�銆�7. 鍏峰倷浣庡姛鑰楀劒(y艒u)鍖栭伕闋�锛屽湪鎬ц兘鑸囧姛鑰椾箣闁撻仈鍒板钩琛�銆�
XC5VFX100T-2FFG1136I 寤ｆ硾鎳夌敤浜庨渶瑕侀珮鎬ц兘瑷堢畻鑳藉姏鍜屽京闆滄暩鎿氳檿鐞嗙殑鎳夌敤鍫存櫙锛屽叿楂斿寘鎷細
銆�銆�1. 閫氫俊闋樺煙涓殑鍩虹珯銆佽矾鐢卞櫒鍜屼氦鎻涙瑷▓銆�
銆�銆�2. 瑕栭牷鍦栧儚铏曠悊绯荤当(t菕ng)锛屽瀵︽檪瑕栭牷绶ㄧ⒓瑙ｇ⒓銆佸湒褰㈡覆鏌撳拰鍦栧儚澧炲挤銆�
銆�銆�3. 宸ユキ(y猫)鑷嫊鍖栨帶鍒剁郴绲�(t菕ng)涓殑寰╅洔绠楁硶瀵︾従鍜屽鏅傛暩鎿氶噰闆嗐��
銆�銆�4. 閱�(y墨)鐧傛垚鍍忚ō鍌欎腑鐨勬暩鎿氳檿鐞嗗拰鎺у埗鍠厓銆�
銆�銆�5. 宓屽叆寮忚▓绠楀钩鑷�锛屽埄鐢ㄥ叾鍏х疆鐨� PowerPC 鏍稿績瀵︾従鎿嶄綔绯荤当(t菕ng)閬嬭鍜屼换鍕欒搴�銆�
銆�銆�6. 杌嶄簨鍜岃埅绌鸿埅澶╅牁鍩熺殑楂樻�ц兘鏁告摎閺堣矾鍜屼俊铏熻檿鐞嗗柈鍏�銆�
XC5VFX1006I
