日韩欧美国产极速不卡一区,国产手机视频在线观看尤物,国产亚洲欧美日韩蜜芽一区,亚洲精品国产免费,亚洲二区三区无码中文,A大片亚洲AV无码一区二区三区,日韩国语国产无码123

鎮ㄥソ锛屾杩庝締(l谩i)鍒扮董搴�(k霉)闆诲瓙甯傚牬(ch菐ng)缍�(w菐ng) 鐧婚寗 | 鍏嶈不(f猫i)娉ㄥ唺(c猫)

鎮ㄦ墍鍦ㄧ殑浣嶇疆锛�闆诲瓙鍏冨櫒浠堕噰璩�(g貌u)缍�(w菐ng) > IC鐧剧 > XC4VLX60-11FFG1148C

XC4VLX60-11FFG1148C 鐧�(f膩)甯冩檪(sh铆)闁� 鏅�(sh铆)闁擄細2022/10/25 14:33:21 鏌ョ湅 闁辫畝锛�854

鐢�(ch菐n)鍝佸瀷铏�(h脿o)

XC4VLX60-11FFG1148C

鎻忚堪

闆嗘垚闆昏矾FPGA 640 I / O 1148FCBGA

鍒嗛

闆嗘垚闆昏矾(IC)锛屽祵鍏ュ紡-FPGA(鐝�(xi脿n)鍫�(ch菐ng)鍙法绋嬮杸闄ｅ垪)

姒傝堪

鐢�(ch菐n)鍝佸瀷铏�(h脿o)

XC4VLX60-11FFG1148C

鎻忚堪

闆嗘垚闆昏矾FPGA 640 I / O 1148FCBGA

鍒嗛

闆嗘垚闆昏矾(IC)锛屽祵鍏ュ紡-FPGA(鐝�(xi脿n)鍫�(ch菐ng)鍙法绋嬮杸闄ｅ垪)

鍒堕�犲晢

Xilinx鍏徃

绯诲垪

Virtex?-4LX

鎵撳寘

鎵樼洡

闆朵欢鐙�鎱�(t脿i)

娲绘��

闆诲-闆绘簮

1.14V1.26V

宸ヤ綔婧害

0掳C85掳C(TJ)

鍖呰/绠�

1148-BBGA锛孎(xi脿n)CBGA

渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏寘瑁�

1148-FCPBGA(35x35)

鍩烘湰闆朵欢铏�(h脿o)

XC4VLX60

鐗规��

    楂樻�ц兘閭忚集鎳�(y墨ng)鐢ㄨВ姹烘柟妗�

    Xesium鏅�(sh铆)閻樻妧琛�(sh霉)

    鏁�(sh霉)瀛楁檪(sh铆)閻樼鐞嗗櫒(DCM)妯″

    闄勫姞鐨勭浉浣嶅尮閰嶆檪(sh铆)閻樺垎闋诲櫒(PMCD)

    宸垎鍏ㄥ眬鏅�(sh铆)閻�

    XtremeDSP Slice

    18x18锛屼簩閫�(j矛n)鍒惰(b菙)纰�锛屽付绗﹁櫉(h脿o)涔樻硶鍣�

    鍙伕鐨勭閬撻殠娈�

    鍏�(n猫i)缃疮鍔犲櫒(48浣�)鍜屽姞娉曞櫒/娓涙硶鍣�

    鏅鸿兘RAM鍏�(n猫i)瀛樺堡娆＄祼(ji茅)妲�(g貌u)

    鍒嗗竷寮廟AM

    闆欑鍙�18KbitRAM濉娐峰彲閬哥殑绠＄窔绱�(j铆)路鍙伕鐨勫彲绶ㄧ▼FIFO閭忚集鑷嫊(d貌ng)灏嘡AM淇¤櫉(h脿o)閲嶆柊鏄犲皠鐐篎IFO淇¤櫉(h脿o)

    楂橀�熷瓨鍎�(ch菙)鍣ㄦ帴鍙ｆ敮鎸丏DR鍜孌DR-2SDRAM锛孮DR-II鍜孯LDRAM-II

    SelectIO?鎶�琛�(sh霉)

    1.5V鑷�3.3VI/O鎿嶄綔

    鍏�(n猫i)缃瓹hipSync婧愬悓姝ユ妧琛�(sh霉)

    鏁�(sh霉)鎺ч樆鎶�(DCI)鏈夋簮绲傜

    绱�(x矛)绮掑害鐨処/O閵�琛屾キ(y猫)鍕�(w霉)(鍦ㄤ竴鍊�(g猫)閵�琛屼腑閫�(j矛n)琛岄厤缃�)

    闈堟椿鐨勯倧杓硣婧�

    瀹夊叏鑺墖AES浣嶆祦鍔犲瘑

    90nm閵匔MOS宸ヨ棟

    1.2V鏍稿績闆诲

    鍊掕鑺墖灏佽锛屽寘鎷劇(w煤)閴涘皝瑁濋伕鎿�


鍙冩暩(sh霉)

鍒堕�犲晢鍖呰瑾�(shu艒)鏄�

鐒�(w煤)閴涳紝F(xi脿n)BGA-1148

绗﹀悎姝愮洘RoHS

鏄�

鐙�鎱�(t脿i)

娲绘��

鍙法绋嬮倧杓鍨�

鐝�(xi脿n)鍫�(ch菐ng)鍙法绋嬮杸闄ｅ垪

鏈�澶ф檪(sh铆)閻橀牷鐜�

1205.0鍏嗚但

JESD-30浠ｇ⒓

S-PBGA-B1148

JESD-609浠ｇ⒓

e1

绺絉AM浣�

2949120

CLB鏁�(sh霉)閲�

6656.0

杓稿叆鏁�(sh霉)閲�

640.0

閭忚集鍠厓鏁�(sh霉)

59904.0

杓稿嚭鏁�(sh霉)閲�

640.0

绔瓙鏁�(sh霉)

1148

鏈�浣庡伐浣滄韩搴�

0鈩�

鏈�楂樺伐浣滄韩搴�

85鈩�

鍖呰涓婚珨鏉愭枡

濉戞枡/鐠�(hu谩n)姘фü(sh霉)鑴�

鍖呰浠ｇ⒓

BGA

鍖呰绛夋晥浠ｇ⒓

BGA1148,34X34,40

鍖呰褰㈢媭

鍥涙柟褰�

宄板�煎洖娴佹韩搴�(鈩�)

245

搴ч珮

3.4姣背

瀛愰鍒�

鐝�(xi脿n)鍫�(ch菐ng)鍙法绋嬮杸闄ｅ垪

闆绘簮闆诲妯�(bi膩o)绋�

1.2浼�

鏈�灏忎緵闆婚浕澹�

1.14浼�

鏈�澶ч浕婧愰浕澹�

1.26浼�

瀹夎椤炲瀷

琛ㄩ潰璨艰

鎶�琛�(sh霉)

CMOS

婧害绛夌礆(j铆)

鍏朵粬

绲傜瀹屾垚

閷�/閵�/閵�(Sn95.5Ag4.0Cu0.5)

绲傜琛ㄦ牸

鐞�

绔瓙闁撹窛

1.0姣背

绲傜浣嶇疆

搴曢儴

鏅�(sh铆)闁揁宄板�煎洖娴佹韩搴︽渶澶у��(绉�)

30

闀�(zh菐ng)搴�

35.0姣背

瀵害

35.0姣背

xc4vlx60-11ffg1148c鎺ㄨ枽渚涙噳(y墨ng)鍟� 鏇村>

  • 鐢�(ch菐n)鍝佸瀷铏�(h脿o)
  • 渚涙噳(y墨ng)鍟�
  • 鏁�(sh霉)閲�
  • 寤犲晢
  • 灏佽/鎵硅櫉(h脿o)
  • 瑭㈠児(ji脿)

xc4vlx60-11ffg1148c璩囨枡 鏇村>

  • 鍨嬭櫉(h脿o)
  • 鎻忚堪
  • 鍝佺墝
  • 闁辫涓嬭級

xc4vlx60-11ffg1148c鍙冩暩(sh霉)

  • 妯�(bi膩o)婧�(zh菙n)鍖呰1
  • 椤炲垾闆嗘垚闆昏矾 (IC)
  • 瀹跺涵宓屽叆寮� - FPGA锛堢従(xi脿n)鍫�(ch菐ng)鍙法绋嬮杸闄ｅ垪锛�
  • 绯诲垪Virtex®-4 LX
  • LAB/CLB鏁�(sh霉)6656
  • 閭忚集鍏冧欢/鍠厓鏁�(sh霉)59904
  • RAM 浣嶇附瑷�(j矛)2949120
  • 杓稿叆/杓稿嚭鏁�(sh霉)640
  • 闁�鏁�(sh霉)-
  • 闆绘簮闆诲1.14 V ~ 1.26 V
  • 瀹夎椤炲瀷琛ㄩ潰璨艰
  • 宸ヤ綔婧害0°C ~ 85°C
  • 灏佽/澶栨1148-BBGA锛孎(xi脿n)CBGA
  • 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁�1148-FCPBGA锛�35x35锛�
  • 鍏跺畠鍚嶇ū122-1495