XC4VLX200-11FF1513I 鏅傞枔锛�2023/7/18 18:09:07 闁辫畝锛�456

鎻忚堪

XC4VLX200-11FF1513I灏囬珮绱氱妯″(ASMBL TM)鏋舵(g貌u)鑸囧悇绋潏娲诲姛鑳界浉绲�(ji茅)鍚�锛屾サ澶у湴澧炲挤(qi谩ng)浜嗗彲绶ㄧ▼閭忚集瑷�(sh猫)瑷堣兘鍔�锛屼娇鍏舵垚鐐篈SIC鎶€琛�(sh霉)鐨勫挤(qi谩ng)澶ф浛浠ｅ搧銆傚畠鍖呮嫭涓夊€嬪钩鑷虹郴鍒椻€斺€擫X銆丗X鍜孲X鈥斺€旀彁渚涘绋姛鑳介伕鎿囧拰绲勫悎渚嗘豢瓒虫墍鏈夊京(f霉)闆滄噳(y墨ng)鐢ㄧ殑闇€姹�銆傚唬娉涚殑hard-lP鍏�(n猫i)鏍告ā濉婂寘鎷琍owerPC铏曠悊鍣紙甯舵湁鏂扮殑APU鎺ュ彛锛夈€佷笁妯″紡浠ュお缍�(w菐ng)MAC銆�622Mb/s鑷�6.5Gbs涓茶鏀剁櫦(f膩)鍣�銆佸皥鐢―SP鐗�銆侀珮閫熸檪閻樼鐞嗛浕璺�銆佸拰婧愬悓姝ユ帴鍙ｅ銆俋C4VLX200-11FF1513I鍣ㄤ欢閲囩敤鏈€鍏堥€�(j矛n)鐨�90绱嶇背閵呭伐钘濈敓鐢�(ch菐n)锛岄噰鐢�300姣背锛�12鑻卞锛夋櫠鍦撴妧琛�(sh霉)銆�

鐢�(ch菐n)鍝佹杩�

鐢�(ch菐n)鍝佸瀷铏�	XC4VLX200-11FF1513I
鎻忚堪	闆嗘垚闆昏矾FPGA 960 I / O 1513FCBGA
鍒嗛	闆嗘垚闆昏矾(IC)锛屽祵鍏ュ紡-FPGA(鐝�(xi脿n)鍫村彲绶ㄧ▼闁€闄ｅ垪)
鍒堕€犲晢	Xilinx鍏徃
绯诲垪	Virtex?-4LX
鎵撳寘	鎵樼洡
闆诲-闆绘簮	1.14V?1.26V
宸ヤ綔婧害	-40掳C?100掳C(TJ)
鍖呰/绠�	1513-BBGA锛孎(xi脿n)CBGA
渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏寘瑁�	1513-FCBGA(40x40)
鍩烘湰闆朵欢铏�	XC4VLX200

鐢�(ch菐n)鍝佸湒鐗�

XC4VLX200-11FF1513I

瑕�(gu墨)鏍煎弮鏁�(sh霉)

鍒堕€犲晢鍖呰瑾槑	FBGA-1513
绗﹀悎REACH	鏄�
鐙€鎱�(t脿i)	娲绘€�
鍙法绋嬮倧杓鍨�	鐝�(xi脿n)鍫村彲绶ㄧ▼闁€闄ｅ垪
鏈€澶ф檪閻橀牷鐜�	1205.0鍏嗚但
JESD-30浠ｇ⒓	S-PBGA-B1513
JESD-609浠ｇ⒓	00
绺絉AM浣�	6193152
CLB鏁�(sh霉)閲�	22272.0
杓稿叆鏁�(sh霉)閲�	960.0
閭忚集鍠厓鏁�(sh霉)	200448.0
杓稿嚭鏁�(sh霉)閲�	960.0
绔瓙鏁�(sh霉)	1513
绲勭箶	22272 CLBS
鍖呰涓婚珨鏉愭枡	濉戞枡/鐠�(hu谩n)姘фü鑴�
鍖呰浠ｇ⒓	BGA
鍖呰绛夋晥浠ｇ⒓	BGA1513,39X39,40
鍖呰褰㈢媭	鍥涙柟褰�
鍖呰褰㈠紡	缍�(w菐ng)鏍奸櫍鍒�
宄板€煎洖娴佹韩搴�(鈩�)	225
搴ч珮	3.25姣背
瀛愰鍒�	鐝�(xi脿n)鍫村彲绶ㄧ▼闁€闄ｅ垪
闆绘簮闆诲妯�(bi膩o)绋�	1.2浼�
鏈€灏忎緵闆婚浕澹�	1.14浼�
鏈€澶ч浕婧愰浕澹�	1.26浼�
瀹夎椤炲瀷	琛ㄩ潰璨艰
鎶€琛�(sh霉)	CMOS
绲傜瀹屾垚	閷�/閴�(Sn63Pb37)
绲傜琛ㄦ牸	鐞�
绔瓙闁撹窛	1.0姣背
绲傜浣嶇疆	搴曢儴
鏅傞枔@宄板€煎洖娴佹韩搴�-鏈€澶у€�(绉�)	30
闀峰害	40.0姣背
瀵害	40.0姣背

鐠�(hu谩n)澧冭垏鍑哄彛鍒嗛

RoHS鐙€鎱�(t脿i)	绗﹀悎RoHS瑕�(gu墨)瀹�
姘村垎鏁忔劅鎬ф按骞�(MSL)	4(72灏忔檪)

CAD妯″瀷

XC4VLX200-11FF1513I绗﹁櫉

XC4VLX200-11FF1513I鑵冲嵃

灏佽

XC4VLX200-11FF1513I灏佽

鏇夸唬鍨嬭櫉

鍨嬭櫉	鍒堕€犲晢	鍝佸悕	鎻忚堪
XC4VLX200-10FF1513I	璩介潏鎬�	FPGA鑺墖	200448Cells 90nm(CMOS)Technology 1.2V 1513Pin FCBGA
XC4VLX200-10FFG1513C	璩介潏鎬�	FPGA鑺墖	200448Cells 90nm Technology 1.2V 1513Pin FCBGA