鏅傞枔锛�2023/7/18 18:18:51
闁辫畝锛�441
鐢�(ch菐n)鍝佸瀷铏� | XC4VLX100-10FF1513I |
鎻忚堪 | 闆嗘垚闆昏矾FPGA 960 I / O 1513FCBGA |
鍒嗛 | 闆嗘垚闆昏矾(IC)锛屽祵鍏ュ紡-FPGA(鐝�(xi脿n)鍫村彲绶ㄧ▼闁�闄ｅ垪) |
鍒堕�犲晢 | Xilinx鍏徃 |
绯诲垪 | Virtex?-4LX |
鎵撳寘 | 鎵樼洡 |
闆诲-闆绘簮 | 1.14V?1.26V |
宸ヤ綔婧害 | -40掳C?100掳C(TJ) |
鍖呰/绠� | 1513-BBGA锛孎(xi脿n)CBGA |
渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏寘瑁� | 1513-FCBGA(40x40) |
鍩烘湰闆朵欢铏� | XC4VLX100 |
鐢�(ch菐n)鍝佸瀷铏� | XC4VLX100-10FF1513I |
鎻忚堪 | 闆嗘垚闆昏矾FPGA 960 I / O 1513FCBGA |
鍒嗛 | 闆嗘垚闆昏矾(IC)锛屽祵鍏ュ紡-FPGA(鐝�(xi脿n)鍫村彲绶ㄧ▼闁�闄ｅ垪) |
鍒堕�犲晢 | Xilinx鍏徃 |
绯诲垪 | Virtex?-4LX |
鎵撳寘 | 鎵樼洡 |
闆诲-闆绘簮 | 1.14V?1.26V |
宸ヤ綔婧害 | -40掳C?100掳C(TJ) |
鍖呰/绠� | 1513-BBGA锛孎(xi脿n)CBGA |
渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏寘瑁� | 1513-FCBGA(40x40) |
鍩烘湰闆朵欢铏� | XC4VLX100 |
XC4VLX100-10FF1513I
鍒堕�犲晢鍖呰瑾槑 | FBGA-1513 |
绗﹀悎REACH | 鏄� |
鐙�鎱�(t脿i) | 娲绘�� |
鍙法绋嬮倧杓鍨� | 鐝�(xi脿n)鍫村彲绶ㄧ▼闁�闄ｅ垪 |
鏈�澶ф檪閻橀牷鐜� | 1028.0鍏嗚但 |
JESD-30浠ｇ⒓ | S-PBGA-B1513 |
JESD-609浠ｇ⒓ | 00 |
绺絉AM浣� | 4423680 |
CLB鏁�(sh霉)閲� | 12288.0 |
杓稿叆鏁�(sh霉)閲� | 960.0 |
閭忚集鍠厓鏁�(sh霉) | 110592.0 |
杓稿嚭鏁�(sh霉)閲� | 960.0 |
绔瓙鏁�(sh霉) | 1513 |
绲勭箶 | 12288 CLBS |
鍖呰涓婚珨鏉愭枡 | 濉戞枡/鐠�(hu谩n)姘фü鑴� |
鍖呰浠ｇ⒓ | BGA |
鍖呰绛夋晥浠ｇ⒓ | BGA1513,39X39,40 |
鍖呰褰㈢媭 | 鍥涙柟褰� |
鍖呰褰㈠紡 | 缍�(w菐ng)鏍奸櫍鍒� |
宄板�煎洖娴佹韩搴�(鈩�) | 225 |
搴ч珮 | 3.25姣背 |
瀛愰鍒� | 鐝�(xi脿n)鍫村彲绶ㄧ▼闁�闄ｅ垪 |
闆绘簮闆诲妯�(bi膩o)绋� | 1.2浼� |
鏈�灏忎緵闆婚浕澹� | 1.14浼� |
鏈�澶ч浕婧愰浕澹� | 1.26浼� |
瀹夎椤炲瀷 | 琛ㄩ潰璨艰 |
鎶�琛�(sh霉) | CMOS |
绲傜瀹屾垚 | 閷�/閴�(Sn63Pb37) |
绲傜琛ㄦ牸 | 鐞� |
绔瓙闁撹窛 | 1.0姣背 |
绲傜浣嶇疆 | 搴曢儴 |
鏅傞枔@宄板�煎洖娴佹韩搴�-鏈�澶�(绉�) | 30 |
闀峰害 | 40.0姣背 |
瀵害 | 40.0姣背 |
RoHS鐙�鎱�(t脿i) | 绗﹀悎RoHS瑕�(gu墨)瀹� |
姘村垎鏁忔劅鎬ф按骞�(MSL) | 4(72灏忔檪) |
XC4VLX100-10FF1513I绗﹁櫉
XC4VLX100-10FF1513I鑵冲嵃
XC4VLX100-10FF1513I灏佽
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