鏅傞枔锛�2025/4/30 10:05:07
闁辫畝锛�29
XC4VFX60-10FF1152C 鏄� Xilinx 鍏徃鎺ㄥ嚭鐨� Virtex-4 绯诲垪 FPGA 鑺墖涓殑涓�鍊嬪瀷铏熴�俈irtex-4 绯诲垪鏄珮鎬ц兘銆侀珮瀵嗗害鐨� FPGA 鐢�(ch菐n)鍝�锛岄仼鐢ㄤ簬閫氫俊銆佷俊铏熻檿鐞�銆佸湒鍍忚檿鐞嗗拰宸ユキ(y猫)鑷嫊鍖栫瓑寰╅洔鎳夌敤銆傝┎鍨嬭櫉鍏锋湁澶у閲忛倧杓硣婧愬拰璞愬瘜鐨勫祵鍏ュ紡鍔熻兘妯″锛岄仼鍚堥渶瑕侀珮閫熸暩(sh霉)鎿�(j霉)铏曠悊鍜屽京闆滅畻娉曞鐝�(xi脿n)鐨勬噳鐢ㄥ牬鏅��
銆�銆�Virtex-4 绯诲垪鍩轰簬鍏堥�茬殑 90nm 宸ヨ棟鍒堕��锛屾彁渚涗簡澶氱ó閰嶇疆閬搁爡浠ユ豢瓒充笉鍚岃ō瑷堥渶姹�銆俋C4VFX60-10FF1152C 灞簬 FX锛團PGA + DSP + HardMAC锛夊瓙绯诲垪锛岄泦鎴愪簡 DSP Slice 鍜屽崈鍏嗕綅鏀剁櫦(f膩)鍣ㄧ瓑鍔熻兘锛屼娇鍏堕潪甯搁仼鍚堥渶瑕佹贩鍚堜俊铏熻檿鐞嗗拰楂橀�熶覆琛岄�ｆ帴鐨勮ō瑷�銆�
鍨嬭櫉锛歑C4VFX60-10FF1152C
銆�銆�鍝佺墝锛歑ilinx
銆�銆�绯诲垪锛歏irtex-4 FX
銆�銆�灏佽椤炲瀷锛欶FG1152 (Flip Chip BGA)
銆�銆�I/O 鏁�(sh霉)閲忥細880
銆�銆�鐢ㄦ埗鍙敤閭忚集鍠厓鏁�(sh霉)锛氱磩 60,000
銆�銆�鍏�(n猫i)宓屽瓨鍎插櫒瀹归噺锛�3.7 Mb
銆�銆�DSP Slice 鏁�(sh霉)閲忥細192
銆�銆�鏈�澶у伐浣滈牷鐜囷細550 MHz
銆�銆�閰嶇疆妯″紡锛歋electMAP銆丮aster/Slave Serial銆丅PI銆丣TAG
銆�銆�闆绘簮闆诲锛�1.2 V 鏍稿績闆诲锛�1.5 V I/O 闆诲
銆�銆�鍔熻�楄寖鍦嶏細瑕栧叿楂旀噳鐢ㄨ�屽畾锛屽吀鍨嬪�肩磩鐐� 5 W 鑷� 20 W
XC4VFX60-10FF1152C 鐨勪富瑕佺壒鎬у寘鎷細
銆�銆�1. 楂樻�ц兘 FPGA 鏋舵锛氶噰鐢� Virtex-4 绯诲垪鍎�(y艒u)鍖栫殑 FPGA 绲愭锛屾彁渚涘挤澶х殑骞惰铏曠悊鑳藉姏鍜岄潏娲荤殑璩囨簮閰嶇疆銆�
銆�銆�2. 宓屽叆寮� DSP Slice锛氭瘡鍊� DSP Slice 鍖呭惈涔樻硶鍣ㄣ�佺疮鍔犲櫒鍜屽瘎瀛樺櫒璩囨簮锛屾敮鎸侀珮鏁堢殑鏁�(sh霉)瀛椾俊铏熻檿鐞嗘搷浣�銆�
銆�銆�3. 鍗冨厗浣嶆敹鐧�(f膩)鍣細鍏�(n猫i)缃閫氶亾楂橀�熶覆琛屾敹鐧�(f膩)鍣紝鏀寔閫熺巼楂橀仈 6.5 Gbps锛岄仼鍚� PCIe銆丟bE 鍜屽叾浠栭珮閫熸帴鍙ｅ崝(xi茅)璀�銆�
銆�銆�4. 澶ц(gu墨)妯￠倧杓硣婧愶細鎿佹湁绱� 60,000 鍊嬮倧杓柈鍏�锛岃兘澶犲鐝�(xi脿n)寰╅洔鐨勭祫鍚堥倧杓拰鏅傚簭閭忚集瑷▓銆�
銆�銆�5. 鍏�(n猫i)宓� Block RAM锛氭彁渚� 3.7 Mb 鐨勫垎甯冨紡瀛樺劜鍣ㄥ拰 Block RAM锛岀敤浜庢暩(sh霉)鎿�(j霉)绶╁瓨鍜屾煡鎵捐〃鍔熻兘銆�
銆�銆�6. 鏀寔澶氱ó閰嶇疆鏂瑰紡锛氬彲閫氶亷 SelectMAP銆丼erial銆丅PI 鎴� JTAG 鏂瑰紡鍔犺級閰嶇疆鏂囦欢锛屾柟渚块枊鐧�(f膩)鍜岃(di脿o)瑭�銆�
銆�銆�7. 宸ユキ(y猫)绱氬彲闈犳�э細缍�(j墨ng)閬庡毚鏍兼脯瑭�锛岀⒑淇濆湪鍚勭ó鐠�(hu谩n)澧冧笅鐨勭┅(w臎n)瀹氶亱琛�銆�
XC4VFX60-10FF1152C 寤ｆ硾鎳夌敤浜庝互涓嬮牁鍩燂細
銆�銆�1. 閫氫俊绯荤当(t菕ng)锛氬鐒＄窔鍩虹珯銆佽矾鐢卞櫒鍜屼氦鎻涙涓�锛岀敤浜庡鐝�(xi脿n)鍩哄付淇¤櫉铏曠悊銆佸崝(xi茅)璀版＇鍔犻�熷拰鏁�(sh霉)鎿�(j霉)鍖呰綁鐧�(f膩)銆�
銆�銆�2. 瑕栭牷鑸囧湒鍍忚檿鐞嗭細閬╃敤浜庡鏅傝闋荤法纰艰В纰�銆佸湒鍍忓寮峰拰瑷堢畻姗熻瑕轰换鍕�銆�
銆�銆�3. 宸ユキ(y猫)鑷嫊鍖栵細鐢ㄤ簬閬嬪嫊鎺у埗銆佹鍣ㄤ汉鎶�琛撳拰宸ュ粻鐩�(ji膩n)鎺х郴绲�(t菕ng)鐨勯珮鎬ц兘鏁�(sh霉)鎿�(j霉)铏曠悊銆�
銆�銆�4. 娓│鑸囨脯閲忚ō鍌欙細濡傜ず娉㈠櫒銆佷俊铏熺櫦(f膩)鐢熷櫒鍜岄牷璀滃垎鏋愬剙涓�锛岀敤浣滄牳蹇冭檿鐞嗗櫒鎴栧崝(xi茅)铏曠悊鍣ㄣ��
銆�銆�5. 閱�(y墨)鐧傛垚鍍忥細鏀寔瓒呰伈娉�銆丆T 鎺冩弿鍜屽叾浠栭啱(y墨)瀛稿奖鍍忚ō鍌欎腑鐨勫京闆滅畻娉曞鐝�(xi脿n)銆�
銆�銆�6. 鏁�(sh霉)鎿�(j霉)涓績锛氱敤浜庡姞閫熸湇鍕欏櫒涓殑鏁�(sh霉)鎿�(j霉)铏曠悊浠诲嫏锛屼緥濡傚姞瀵嗚В瀵嗗拰澹撶府瑙ｅ绺搷浣�銆�
XC4VFX60-11FF1152C
銆�銆�XC4VFX60-12FF1152C
