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鎮ㄥソ锛屾杩庝締(l谩i)鍒扮董搴�(k霉)闆诲瓙甯傚牬(ch菐ng)缍�(w菐ng) 鐧婚寗 | 鍏嶈不(f猫i)娉ㄥ唺(c猫)

鎮ㄦ墍鍦ㄧ殑浣嶇疆锛�闆诲瓙鍏冨櫒浠堕噰璩�(g貌u)缍�(w菐ng) > IC鐧剧 > XC4VFX100-10FFG1152I

XC4VFX100-10FFG1152I 鐧�(f膩)甯冩檪(sh铆)闁� 鏅�(sh铆)闁擄細2023/8/4 17:56:39 鏌ョ湅 闁辫畝锛�680

鐢�(ch菐n)鍝佹杩�

鐢�(ch菐n)鍝佸瀷铏�(h脿o)

XC4VFX100-10FFG1152I

鎻忚堪

IC FPGA 576 I/O 1152FCBGA

鍒嗛(l猫i)

闆嗘垚闆昏矾(IC)锛屽祵鍏ュ紡FPGA(鐝�(xi脿n)鍫�(ch菐ng)鍙法绋嬮杸(m茅n)闄ｅ垪)

鐢熺敘(ch菐n)寤犲

Xilinx鍏徃

绯诲垪

Virtex?-4 FX

閮ㄥ垎鐙�鎱�(t脿i)

娲绘��

闆诲-闆绘簮

1.14V~1.26V

宸ヤ綔婧害

-40掳C~100掳C(TJ)

鍖�/绠�

1152-BBGA锛孎(xi脿n)CBGA

渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏寘

1152-FCBGA(35x35)

鍩虹(ch菙)閮ㄤ欢铏�(h脿o)

XC4VFX100

鐢�(ch菐n)鍝佸湒鐗�

XC4VFX100-10FFG1152I

XC4VFX100-10FFG1152I

瑕�(gu墨)鏍煎弮鏁�(sh霉)

鍙法绋嬮倧杓(l猫i)鍨�

鐝�(xi脿n)鍫�(ch菐ng)鍙法绋嬮杸(m茅n)闄ｅ垪

绗﹀悎REACH妯�(bi膩o)婧�(zh菙n)

鏄�

绗﹀悎姝愮洘RoHS妯�(bi膩o)婧�(zh菙n)

鏄�

鐙�鎱�(t脿i)

娲绘��

鏅�(sh铆)閻橀牷鐜�-鏈�澶у��

1028.0 MHz

JESD-30浠ｇ⒓

S-PBGA-B1152

JESD-609浠ｇ⒓

E1

绺絉AM浣嶆暩(sh霉)

6930432

CLB鏁�(sh霉)閲�

10544.0

杓稿叆鏁�(sh霉)閲�

576.0

閭忚集鍠厓鐨勬暩(sh霉)閲�

94896.0

杓稿嚭鏁�(sh霉)閲�

576.0

绲傜鏁�(sh霉)閲�

1152

绲勭箶

10544 CLBS

宄板�煎洖娴佹韩搴�(鈩�)

245

璩囨牸鐙�鎱�(t脿i)

涓嶅悎鏍�

鍧愬Э楂樺害-鏈�澶�

3.4姣背

瀛愰(l猫i)鍒�

鐝�(xi脿n)鍫�(ch菐ng)鍙法绋嬮杸(m茅n)闄ｅ垪

闆绘簮闆诲

1.2 V

闆绘簮闆诲-鏈�灏忓��

1.14 V

闆绘簮闆诲-鏈�澶у��

1.26 V

瀹夎椤�(l猫i)鍨�

琛ㄩ潰璨艰

鎶�琛�(sh霉)

CMOS

绲傜瀹屾垚

閷�/閵�/閵�(Sn95.5Ag4.0Cu0.5)

绲傜琛ㄦ牸

鐞�

绲傜闁撹窛

1.0姣背

绲傜浣嶇疆

搴曢儴

鏅�(sh铆)闁揁宄板�煎洖娴佹韩搴�-鏈�澶у��(s)

涓夊崄

闀�(zh菐ng)搴�

35.0姣背

瀵害

35.0姣背

鍖呰楂旀潗鏂�

濉戞枡/鐠�(hu谩n)姘фü(sh霉)鑴�

鍖呰９浠ｇ⒓

BGA

鍖呯瓑鍍�(ji脿)浠ｇ⒓

BGA1152,34X34,40

鍖呰褰㈢媭

寤ｅ牬(ch菐ng)

鍖呰棰�(f膿ng)鏍�

缍�(w菐ng)鏍奸櫍鍒�

鍒堕�犲晢鍖呰瑾�(shu艒)鏄�

鐒�(w煤)閴�锛孎(xi脿n)BGA-1152

鐠�(hu谩n)澧冭垏鍑哄彛鍒嗛(l猫i)

鐒�(w煤)閴涚媭鎱�(t脿i)/RoHS鐙�鎱�(t脿i)

鐒�(w煤)閴�/绗﹀悎RoHS妯�(bi膩o)婧�(zh菙n)

婵曞害鏁忔劅搴︾瓑绱�(j铆)(MSL)

4(72灏忔檪(sh铆))

鐗归粸(di菐n)

?閬╃敤浜庡祵鍏ュ紡骞宠嚭(t谩i)鎳�(y墨ng)鐢ㄧ殑楂樻�ц兘锛屽叏鍔熻兘瑙ｆ焙鏂规

?Xesium?鏅�(sh铆)閻樻妧琛�(sh霉)

銆傛暩(sh霉)瀛楁檪(sh铆)閻樼鐞嗗櫒(DCM)濉�

銆傞檮鍔犵殑鐩镐綅鍖归厤鏅�(sh铆)閻樺垎闋诲櫒(PMCD)

銆傚樊鍒嗗叏鐞冩檪(sh铆)閻�

?XtremeDSP?鍒囩墖

銆�18 x 18锛屼簩閫�(j矛n)鍒惰(b菙)纰�锛屽付绗﹁櫉(h脿o)涔樻暩(sh霉)

銆傚彲閬哥殑绠￠亾闅庢

銆傚収(n猫i)缃疮鍔犲櫒(48浣�)鍜屽姞娉曞櫒/娓涙硶鍣�

?鏅鸿兘RAM鍏�(n猫i)瀛樺堡娆＄祼(ji茅)妲�(g貌u)

銆傚垎甯冨紡RAM

銆傞洐绔彛18-Kbit RAM妯″路鍙伕娴佹按绶氱礆(j铆)路鍙伕鐨勫彲绶ㄧ▼FIFO閭忚集鑷嫊(d貌ng)灏嘡AM淇¤櫉(h脿o)閲嶆柊鏄犲皠鐐篎IFO淇¤櫉(h脿o)

銆傞珮閫熷瓨鍎�(ch菙)鍣ㄦ帴鍙ｆ敮鎸丏DR鍜孌DR-2 SDRAM锛孮DR-II鍜孯LDRAM-II銆�

?SelectIO?鎶�琛�(sh霉)

銆�1.5V鑷�3.3VI / O鎿嶄綔

銆傚収(n猫i)缃瓹hipSync?婧愬悓姝ユ妧琛�(sh霉)

銆傛暩(sh霉)瀛楁帶鍒堕樆鎶�(DCI)鏈夋簮绲傜

銆傜簿绱�(x矛)鐨処 / O閵�琛屾キ(y猫)鍕�(w霉)(鍦ㄤ竴瀹堕妧琛岄厤缃�)

?闈堟椿鐨勯倧杓硣婧�

?瀹夊叏鑺墖AES姣旂壒娴佸姞瀵�

?90 nm閵匔MOS宸ヨ棟

?1.2V鏍稿績闆诲

?鍊掕鑺墖灏佽鍖呮嫭鐒�(w煤)閴涘皝瑁濋伕鎿�

?RocketIO?622 Mb / s鑷�6.5 Gb / s澶氬崈鍏嗕綅鏀剁櫦(f膩)鍣�(MGT)[鍍呴檺FX]

?IBM PowerPC RISC铏曠悊鍣ㄦ牳蹇僛鍍呴檺FX]

銆侾owerPC 405(PPC405)鏍稿績

銆傝紨鍔╄檿鐞嗗櫒鍠厓鎺ュ彛(鐢ㄦ埗鍗�(xi茅)铏曠悊鍣�)

?澶氬��(g猫)涓夋厠(t脿i)浠ュお缍�(w菐ng)MAC [鍍呴檺FX]

CAD妯″瀷

XC4VFX100-10FFG1152I绗﹁櫉(h脿o)

XC4VFX100-10FFG1152I绗﹁櫉(h脿o)

XC4VFX100-10FFG1152I鑵冲嵃

XC4VFX100-10FFG1152I鑵冲嵃

xc4vfx100-10ffg1152i鎺ㄨ枽渚涙噳(y墨ng)鍟� 鏇村>

  • 鐢�(ch菐n)鍝佸瀷铏�(h脿o)
  • 渚涙噳(y墨ng)鍟�
  • 鏁�(sh霉)閲�
  • 寤犲晢
  • 灏佽/鎵硅櫉(h脿o)
  • 瑭㈠児(ji脿)

xc4vfx100-10ffg1152i鍦栫墖

xc4vfx100-10ffg1152i

xc4vfx100-10ffg1152i鍙冩暩(sh霉)

  • 妯�(bi膩o)婧�(zh菙n)鍖呰1
  • 椤�(l猫i)鍒�闆嗘垚闆昏矾 (IC)
  • 瀹跺涵宓屽叆寮� - FPGA锛堢従(xi脿n)鍫�(ch菐ng)鍙法绋嬮杸(m茅n)闄ｅ垪锛�
  • 绯诲垪Virtex®-4 FX
  • LAB/CLB鏁�(sh霉)10544
  • 閭忚集鍏冧欢/鍠厓鏁�(sh霉)94896
  • RAM 浣嶇附瑷�(j矛)6930432
  • 杓稿叆/杓稿嚭鏁�(sh霉)576
  • 闁�(m茅n)鏁�(sh霉)-
  • 闆绘簮闆诲1.14 V ~ 1.26 V
  • 瀹夎椤�(l猫i)鍨�琛ㄩ潰璨艰
  • 宸ヤ綔婧害-40°C ~ 100°C
  • 灏佽/澶栨1152-BBGA锛孎(xi脿n)CBGA
  • 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁�1152-FCBGA锛�35x35锛�