XC3SD1800A-4FGG676C 鏅�(sh铆)闁擄細2023/7/11 11:42:22 闁辫畝锛�786

鎻忚堪

銆€銆€XC3SD1800A-4FGG676CDSP绯诲垪寤虹珛鍦⊿partan-3A FPGA绯诲垪閫氶亷澧炲姞姣忓€�(g猫)閭忚集鐨勫収(n猫i)瀛橀噺鍜屾坊鍔燲tremeDSPTM DSP48A鐗�銆傛柊鐨勫姛鑳芥彁楂樼郴绲�(t菕ng)鎬ц兘骞堕檷浣庨厤缃垚鏈�銆傚櫒浠跺寮�(qi谩ng)锛岀祼(ji茅)鍚堢稉(j墨ng)閬庨(y脿n)璀夌殑90nm宸ヨ棟鎶€琛�(sh霉)锛屾瘡us鍙彁渚涙瘮浠ュ線鏇村鐨勫姛鑳藉拰甯跺锛岀偤鍙法绋嬮倧杓拰DSP铏曠悊琛屾キ(y猫)妯圭珛浜嗘柊妯�(bi膩o)婧�(zh菙n)銆�

銆€銆€XC3SD1800A-4FGG676C鎿�(ku貌)灞曞苟澧炲挤(qi谩ng)浜哠partan-3AFPGA绯诲垪锛屽苟鍏锋湁椤嶅鐨勫RAM鍜孹tremeDSP DSP48A鐗囥€俋tremeDSP DSP48A鐗囧彇浠ｄ簡Spartan-3A鍣ㄤ欢涓殑18x18涔樻硶鍣�锛屽苟涓斿熀浜嶸irtexR-4鍣ㄤ欢涓殑DSP48濉娿€�

銆€銆€閫氶亷娣诲姞涓€鍊�(g猫)杓稿嚭瀵勫瓨鍣�锛屽RAM涔熷緱鍒颁簡澧炲挤(qi谩ng)锛屽彲浠ラ亱(y霉n)琛屽緱鏇村揩銆俋C3SD1800A-4FGG676C鍣ㄤ欢涓殑濉奟AM鍜孌SP48ASlice閮戒互250MHz鐨勬渶浣庢垚鏈亱(y霉n)琛岋紝妯�(bi膩o)婧�(zh菙n)-4閫熷害绛夌礆(j铆)銆傜敱浜庡叾鍑鸿壊鐨凞SP鎬у児(ji脿)姣�锛岄潪甯搁仼鍚堝唬娉涚殑娑堣不(f猫i)闆诲瓙鎳�(y墨ng)鐢�锛屼緥濡傚甯舵帴鍏�銆佸搴恫(w菐ng)绲�(lu貌)銆侀’绀�/鎶曞奖鍜屾暩(sh霉)瀛楅浕瑕栥€係partan-3ADSP绯诲垪鏄竴鍊�(g猫)鎺╃⒓绶ㄧ▼ASIC鐨勫崜瓒婃浛浠ｅ搧銆侳PGA閬垮厤浜嗛珮鏄傜殑鍒濆鎴愭湰銆佸啑闀�(zh菐ng)鐨勯枊鐧�(f膩)鍛ㄦ湡锛屼互鍙婂偝绲�(t菕ng)ASIC鍥烘湁鐨勪笉闈堟椿鎬с€傛澶�锛孎(xi脿n)PGA鍙法绋嬫€у厑瑷卞湪鐝�(xi脿n)鍫�(ch菐ng)閫�(j矛n)琛岃ō(sh猫)瑷�(j矛)鍗囩礆(j铆)锛岃€岀劇闇€鏇存彌纭欢銆�

鐢�(ch菐n)鍝佹杩�

鐢�(ch菐n)鍝佸瀷铏�(h脿o)	XC3SD1800A-4FGG676C
鎻忚堪	IC FPGA 519 I / O 676FBGA
鍒嗛	闆嗘垚闆昏矾(IC)锛屽祵鍏ュ紡-FPGA(鐝�(xi脿n)鍫�(ch菐ng)鍙法绋嬮杸闄ｅ垪)
鍒堕€犲晢	Xilinx鍏徃
绯诲垪	Spartan?-3ADSP
闆诲-闆绘簮	1.14V?1.26V
宸ヤ綔婧害	0掳C?85掳C(TJ)
鍖呰/绠�	676-BGA
渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏寘瑁�	676-FBGA(27x27)
鍩烘湰闆朵欢铏�(h脿o)	XC3SD1800

鐢�(ch菐n)鍝佸湒鐗�

XC3SD1800A-4FGG676C

瑕�(gu墨)鏍煎弮鏁�(sh霉)

鐢�(ch菐n)鍝佺ó椤�	FPGA - 鐝�(xi脿n)鍫�(ch菐ng)鍙法绋嬮杸闄ｅ垪
闆朵欢鐙€鎱�(t脿i)	娲绘€�
鐢�(ch菐n)鍝�	Spartan-3A
绯诲垪	XC3SD1800A
绺絉AM浣�	1548288
閭忚集鍏冧欢鏁�(sh霉)閲�	37440 LE
杓稿叆/杓稿嚭绔暩(sh霉)閲�	519 I / O
宸ヤ綔闆绘簮闆诲	1浼�
鏌垫サ鏁�(sh霉)閲�	1800000
LAB / CLB鐨勬暩(sh霉)閲�	4160
鍒嗗竷寮廟AM	260鍗冧綅
鍏�(n猫i)宓屽紡濉奟AM - EBR	1512姣旂壒
鏈€澶у伐浣滈牷鐜�	250鍏嗚但
楂樺害	1.75姣背
闀�(zh菐ng)搴�	27姣背
瀵害	27姣背
瀹夎棰�(f膿ng)鏍�	璨肩墖/璨肩墖
灏佽 / 绠遍珨	FBGA-676

鐠�(hu谩n)澧冭垏鍑哄彛鍒嗛

椤炲瀷	鎻忚堪
RoHS鐙€鎱�(t脿i)	绗﹀悎ROHS3
姘村垎鏁忔劅鎬ф按骞�(MSL)	3(168灏忔檪(sh铆))

鐗归粸(di菐n)

闈炲父浣庢垚鏈€侀珮鎬ц兘鐨凞SP瑙ｆ焙鏂规锛岄仼鐢ㄤ簬楂樺閲�銆佷綆鎴愭湰鐨勬噳(y墨ng)鐢�
250MHzXtremeDSPDSP48A鐗�
鍒嗗堡閬告搰瀛樺劜(ch菙)鍣�?瀛樺劜(ch菙)鍣ㄧ祼(ji茅)妲�(g貌u)
闆欓噺绋媀CCAUX闆绘簮绨�(ji菐n)鍖栦簡鍍�3.3V鐨勮ō(sh猫)瑷�(j矛)
鏆仠銆佷紤鐪犳ā寮忛檷浣庣郴绲�(t菕ng)鍔熻€�
浣庡姛鑰楅伕闋�(xi脿ng)闄嶄綆闈滄厠(t脿i)闆绘祦
澶氶浕澹撱€佸妯�(bi膩o)婧�(zh菙n)閬告搰?鎺ュ彛寮曡叧
璞愬瘜闈堟椿鐨勯倧杓硣婧�
鍏€�(g猫)鏁�(sh霉)瀛楁檪(sh铆)閻樼鐞嗗櫒(DCM)
鍏€�(g猫)浣庡亸宸叏灞€鏅�(sh铆)閻樼恫(w菐ng)绲�(lu貌)锛屾瘡涓€鍗婅ō(sh猫)鍌欏叓鍊�(g猫)椤嶅鏅�(sh铆)閻橈紝鍔犱笂璞愬瘜鐨勪綆鍋忓樊璺敱
鑸囪妤�(y猫)妯�(bi膩o)婧�(zh菙n)PROMs鐨勯厤缃帴鍙�

寮曡叧鍦�

CAD妯″瀷

XC3SD1800A-4FGG676C绗﹁櫉(h脿o)

XC3SD1800A-4FGG676C鑵冲嵃

灏佽

XC3SD1800A-4FGG676C灏佽

鏇夸唬鍨嬭櫉(h脿o)

鍨嬭櫉(h脿o)	鍒堕€犲晢	鍝佸悕	鎻忚堪
XC3SD1800A-4FG676I	璩介潏鎬�	FPGA鑺墖	1.8M Gates 37440 Cells 667MHz 90nm Technology 1.2V 676Pin FBGA
XC3SD1800A-5FG676C	璩介潏鎬�	FPGA鑺墖	1.8M Gates 37440 Cells 770MHz 90nm Technology 1.2V 676Pin FBGA
XC3SD1800A-4FGG676I	璩介潏鎬�	FPGA鑺墖	1.8M Gates 37440 Cells 667MHz 90nm Technology 1.2V 676Pin FBGA