鐢�(ch菐n)鍝佸瀷铏�(h脿o) XC3S500E-5FTG256C鎻忚堪IC FPGA 190 I/O 256FTBGA鍒嗛�為泦鎴愰浕璺�(IC)锛屽祵鍏ュ紡FPGA(鐝�(xi脿n)鍫村彲绶ㄧ▼闁�闄ｅ垪)鐢熺敘(ch菐n)寤犲�禭ilinx鍏�鍙哥郴鍒桽partan?-3E閮ㄥ垎鐙�鎱�(t脿i)娲绘�ч浕澹�-闆绘簮1.14V~1.26V宸ヤ綔婧�搴�0掳C~85掳C(TJ)鍖�/绠�256-LBGA 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏寘256-FTBGA(17x17)鍩虹��(ch菙)閮ㄤ欢铏�(h脿o)XC3S500E

    楂樺垎杈ㄧ巼鐩哥Щ

    鐒￠墰灏佽�濋伕鎿�

    蹇�閫熼爯(y霉)娓�閫�(j矛n)浣嶉倧杓�

    璞愬瘜锛岄潏娲荤殑閭忚集璩囨簮

    闋荤巼鍚堟垚锛屼箻娉�锛岄櫎娉�

    浣庢垚鏈琎FP鍜孊GA灏佽�濋伕闋�(xi脿ng)

    鏅�(sh铆)閻樺亸绉绘秷闄�(寤堕伈閹栧畾鐠�(hu谩n))

    甯歌�嬬殑瓒宠贰鏀�鎸佺啊鍠�鐨勫瘑搴﹂伔绉�

    缍�(j墨ng)閬庨��(y脿n)璀夌殑鍏堥��(j矛n)90绱嶇背宸ヨ棟鎶�琛�(sh霉)

    澶氶浕澹�锛屽�氭��(bi膩o)婧�(zh菙n)SelectIO鎺ュ彛寮曡叧

    鏈�澶�376鍊�(g猫)I / O寮曡叧鎴�156鍊�(g猫)宸�鍒嗕俊铏�(h脿o)灏�(du矛)

    3.3V锛�2.5V锛�1.8V锛�1.5V鍜�1.2V淇¤櫉(h脿o)

    姣忓��(g猫)I / O 622+ Mb / s鏁�(sh霉)鎿�(j霉)鍌宠几閫熺巼

    澧炲挤(qi谩ng)鐨勯洐鍊嶆暩(sh霉)鎿�(j霉)閫熺巼(DDR)鏀�鎸�

    DDR SDRAM鏀�鎸侀珮閬�(d谩)333 Mb / s

    楂樻晥鐨勫��澶氳矾寰�(f霉)鐢ㄥ櫒锛屽��閭忚集

    鍒嗗堡SelectRAM鍏�(n猫i)瀛樻灦妲�(g貌u)

    楂橀仈(d谩)648 Kbits鐨勫揩閫烞lock RAM

    楂橀仈(d谩)231 Kbits鐨勯珮鏁堝垎甯冨紡RAM

    鏈�澶氬叓鍊�(g猫)鏁�(sh霉)瀛楁檪(sh铆)閻樼�＄悊鍣�(DCM)

    瀵�闋荤巼鑼冨��(5 MHz鑷�300 MHz浠ヤ笂)

    绗﹀悎琛屾キ(y猫)妯�(bi膩o)婧�(zh菙n)鐨凱ROM鐨勯厤缃�鐣岄��

    x8鎴杧8 / x16骞惰�孨OR Flash PROM

    閲囩敤JTAG鐨勪綆鎴愭湰Xilinx骞宠嚭(t谩i)闁冨瓨

    瀹屾暣鐨刋ilinxISE鍜學ebPACK杌熶欢

    澧炲挤(qi谩ng)鍨�18 x 18涔樻硶鍣�锛屽付鍙�閬告祦姘寸窔

    IEEE 1149.1 / 1532 JTAG绶ㄧ▼/瑾�(di脿o)瑭︾��鍙�

    浣庢垚鏈�锛岀瘈(ji茅)鐪佺┖闁撶殑SPI涓茶�孎lash PROM

    MicroBlaze鍜孭icoBlaze宓屽叆寮忚檿鐞嗗櫒鍏�(n猫i)鏍�

    LVCMOS锛孡VTTL锛孒STL鍜孲STL鍠�绔�淇¤櫉(h脿o)妯�(bi膩o)婧�(zh菙n)

    鐪烲VDS锛孯SDS锛宮ini-LVDS锛屽樊鍒咹STL / SSTL宸�鍒咺 /O

    瀹屽叏鍏煎�圭��32/64浣�33 MHz PCI鏀�鎸�(鏌愪簺瑷�(sh猫)鍌欑偤66 MHz)

    姣忓崐鍊�(g猫)鍣ㄤ欢鏈�8鍊�(g猫)鍏ㄥ眬鏅�(sh铆)閻樺拰8鍊�(g猫)椤嶅�栨��(sh铆)閻橈紝浠ュ強璞愬瘜鐨勪綆鍋忕Щ璺�鐢�

    妤典綆鎴愭湰锛岄珮鎬ц兘鐨勯倧杓�瑙ｆ焙鏂规��锛岄仼鐢ㄤ簬澶ф壒閲�锛岄潰鍚戞秷璨�(f猫i)鑰呯殑鎳�(y墨ng)鐢�

    瀵嗗害楂橀仈(d谩)33,192鍊�(g猫)閭忚集鍠�鍏�锛屽寘鎷�鍙�閬哥殑绉讳綅瀵勫瓨鍣ㄦ垨鍒嗗竷寮廟AM鏀�鎸�