鍨嬭櫉(h脿o)锛歑C3S200-4FTG256E
銆�銆�鍝佺墝锛歑ilinx
銆�銆�绯诲垪锛歋partan-3
銆�銆�灏佽�濋�炲瀷锛欶TG256锛團ine Line Ball Grid Array锛�
銆�銆�閫熷害绛夌礆(j铆)锛�-4锛堣〃绀鸿純蹇�鐨勯�熷害绛夌礆(j铆)锛�
銆�銆�閰嶇疆闁冨瓨锛氫笉鍏�(n猫i)缃�锛岄渶澶栨帴閰嶇疆鑺�鐗�
銆�銆�閭忚集鍠�鍏冩��(sh霉)閲忥細绱� 200,000 鍊�(g猫)
銆�銆�RAM 瀹归噺锛�188 Kb
銆�銆�DSP Slice 鏁�(sh霉)閲忥細鐒�(w煤)
銆�銆�宸ヤ綔闆诲�� I/O锛�1.2V / 1.5V / 1.8V / 2.5V / 3.3V锛堝彇姹轰簬鍏烽珨 Bank 閰嶇疆锛�
銆�銆�鍏�(n猫i)鏍搁浕澹擄細1.2V
銆�銆�宸ヤ綔婧�搴﹁寖鍦嶏細鍟嗘��(y猫)绱�(j铆)锛�0掳C 鑷� 70掳C锛�锛屽伐妤�(y猫)绱�(j铆)锛�-40掳C 鑷� 85掳C锛�

XC3S200-4FTG256E 鎻愪緵浜嗗挤(qi谩ng)澶х殑闈堟椿鎬у拰鎬ц兘琛ㄧ従(xi脿n)锛屼互涓嬫槸鍏朵富瑕佺壒榛�(di菐n)锛�
銆�銆�1. 鍙�绶ㄧ▼閭忚集绲�(ji茅)妲�(g貌u)鏀�鎸佸��(f霉)闆滅殑绲勫悎閭忚集鑸囨檪(sh铆)搴忛倧杓�瑷�(sh猫)瑷�(j矛)銆�
銆�銆�2. 鍏�(n猫i)閮ㄩ泦鎴愪簡澶氶仈(d谩) 188 Kb 鐨� Block RAM锛岄仼鍚堢敤浣� FIFO 绶╂矕鍗�(q奴)鎴栧皬鍨嬫暩(sh霉)鎿�(j霉)瀛樺劜(ch菙)銆�
銆�銆�3. 鏀�鎸佸�氱ó楂橀�熶覆琛屾帴鍙ｆ��(bi膩o)婧�(zh菙n)锛屼緥濡� LVDS 鍜� SSTL銆�
銆�銆�4. 鍖呭惈澶氶仈(d谩) 128 鍊�(g猫)鐢ㄦ埗 I/O 寮曡叧锛岃兘澶犻仼閰嶅悇绋�澶栭儴瑷�(sh猫)鍌欓�ｆ帴闇�姹�銆�
銆�銆�5. 浣跨敤 Xilinx 鐨� ISE Design Suite 杌熶欢宸ュ叿閫�(j矛n)琛岄枊(k膩i)鐧�(f膩)锛屾敮鎸� Verilog 鍜� VHDL 绛夌‖浠舵弿杩拌獮(y菙)瑷�銆�
銆�銆�6. 鍣ㄤ欢鍔熻�楄純浣�锛岄潪甯搁仼鍚堝皪(du矛)鎴愭湰鏁忔劅鐨勬噳(y墨ng)鐢ㄥ牬(ch菐ng)鏅�銆�
銆�銆�7. FTG256 灏佽�濆舰寮忔彁渚涗簡鑹�濂界殑鏁ｇ啽鐗规�у拰闆绘埃鎬ц兘銆�

XC3S200-4FTG256E 寤ｆ硾鎳�(y墨ng)鐢ㄤ簬浠ヤ笅闋�(l菒ng)鍩燂細
銆�銆�1. 鏁�(sh霉)瀛椾俊铏�(h脿o)铏曠悊锛氶煶闋�/瑕栭牷绶ㄧ⒓瑙ｇ⒓銆佸湒鍍忚檿鐞嗙瓑銆�
銆�銆�2. 閫氫俊瑷�(sh猫)鍌欙細鍩哄付铏曠悊銆佸崝(xi茅)璀拌綁(zhu菐n)鎻�銆佷俊铏�(h脿o)瑾�(di脿o)鍒惰В瑾�(di脿o)绛�銆�
銆�銆�3. 宸ユキ(y猫)鎺у埗锛氶亱(y霉n)鍕�(d貌ng)鎺у埗鍣�銆佹暩(sh霉)鎿�(j霉)閲囬泦绯荤当(t菕ng)銆�
銆�銆�4. 娑堣不(f猫i)椤為浕瀛愮敘(ch菐n)鍝侊細瀹堕浕鎺у埗鍣�銆佹父鎴叉��(j墨)鎿�(ku貌)灞曟ā濉�銆�
銆�銆�5. 宓屽叆寮忕郴绲�(t菕ng)锛氬井铏曠悊鍣ㄥ崝(xi茅)铏曠悊鍣�銆佸��(sh铆)鏅�(sh铆)鎿嶄綔绯荤当(t菕ng)鍔犻��銆�
銆�銆�6. 鏁欒偛绉戠爺锛欶PGA 瀵�(sh铆)椹�(y脿n)骞宠嚭(t谩i)銆佺畻娉曢��(y脿n)璀夊師鍨�銆�

XC3S200-4FGG256I
銆�銆�XC3S200-4PQ160C
銆�銆�XC3S200-4FT256C