鐢�(ch菐n)鍝佸瀷铏� XC3S1200E-4FGG400I鎻忚堪IC FPGA 304 I/O 400FBGA鍒嗛�為泦鎴愰浕璺�(IC)锛屽祵鍏ュ紡FPGA(鐝�(xi脿n)鍫村彲绶ㄧ▼闁�闄ｅ垪)鐢熺敘(ch菐n)寤犲�禭ilinx鍏�鍙哥郴鍒桽partan?-3E閮ㄥ垎鐙�鎱�(t脿i)娲绘�ч浕澹�-闆绘簮1.14V~1.26V宸ヤ綔婧�搴�-40掳C~100掳C(TJ)鍖�/绠�400-BGA渚涙噳鍟嗚ō鍌欏寘400-FBGA(21x21)鍩虹�庨儴浠惰櫉XC3S1200E

楂樺垎杈ㄧ巼鐩哥Щ

鐒￠墰灏佽�濋伕鎿�

浣庢垚鏈琎FP鍜孊GA灏佽�濋伕闋�

甯歌�嬬殑瓒宠贰鏀�鎸佺啊鍠�鐨勫瘑搴﹂伔绉�

缍�(j墨ng)閬庨�楄瓑鐨勫厛閫�90绱嶇背宸ヨ棟鎶�琛�

澶氶浕澹�锛屽�氭�欐簴SelectIO?鎺ュ彛寮曡叧

鏈�澶�376鍊婭 / O寮曡叧鎴�156鍊嬪樊鍒嗕俊铏熷皪

LVCMOS锛孡VTTL锛孒STL鍜孲STL鍠�绔�淇¤櫉妯欐簴

3.3V锛�2.5V锛�1.8V锛�1.5V鍜�1.2V淇¤櫉

姣忓�婭 / O 622+ Mb / s鏁�(sh霉)鎿�(j霉)鍌宠几閫熺巼

鐪烲VDS锛孯SDS锛宮ini-LVDS锛屽樊鍒咹STL / SSTL宸�鍒咺 / O.

澧炲挤鐨勯洐鍊嶆暩(sh霉)鎿�(j霉)閫熺巼(DDR)鏀�鎸�

DDR SDRAM鏀�鎸侀珮閬�333 Mb / s

璞愬瘜锛岄潏娲荤殑閭忚集璩囨簮

楂樻晥鐨勫��澶氳矾寰╃敤鍣�锛屽��閭忚��

蹇�閫熼爯娓�閫蹭綅閭忚集

澧炲挤鍨�18 x 18涔樻硶鍣�锛屽付鍙�閬告祦姘寸��

IEEE 1149.1 / 1532 JTAG绶ㄧ▼/瑾胯│绔�鍙�

鍒嗗堡SelectRAM?鍏у瓨鏋舵��

楂橀仈648 Kbits鐨勫揩閫烞lock RAM

楂橀仈231 Kbits鐨勯珮鏁堝垎甯冨紡RAM

鏈�澶氬叓鍊嬫暩(sh霉)瀛楁檪閻樼�＄悊鍣�(DCM)

鏅傞悩鍋忕Щ娑堥櫎(寤堕伈閹栧畾鐠�(hu谩n))

闋荤巼鍚堟垚锛屼箻娉�锛岄櫎娉�

瀵�闋荤巼鑼冨��(5 MHz鑷�300 MHz浠ヤ笂)

绗﹀悎琛屾キ(y猫)妯欐簴鐨凱ROM鐨勯厤缃�鐣岄��

浣庢垚鏈�锛岀瘈(ji茅)鐪佺┖闁撶殑SPI涓茶�孎lash PROM

x8鎴杧8 / x16骞惰�孨OR Flash PROM

閲囩敤JTAG鐨勪綆鎴愭湰Xilinx?骞宠嚭闁冨瓨

瀹屾暣鐨刋ilinxISE?鍜學ebPACK?杌熶欢

MicroBlaze?鍜孭icoBlaze?宓屽叆寮忚檿鐞嗗櫒鍏ф牳

瀹屽叏鍏煎�圭��32/64浣�33 MHz PCI鏀�鎸�(鏌愪簺瑷�鍌欑��66 MHz)

姣忓崐鍊嬪櫒浠舵湁8鍊嬪叏灞�鏅傞悩鍜�8鍊嬮�嶅�栨檪閻橈紝浠ュ強璞愬瘜鐨勪綆鍋忕Щ璺�鐢�

妤典綆鎴愭湰锛岄珮鎬ц兘鐨勯倧杓�瑙ｆ焙鏂规��锛岄仼鐢ㄤ簬澶ф壒閲�锛岄潰鍚戞秷璨昏�呯殑鎳夌敤

瀵嗗害楂橀仈33,192鍊嬮倧杓�鍠�鍏�锛屽寘鎷�鍙�閬哥殑绉讳綅瀵勫瓨鍣ㄦ垨鍒嗗竷寮廟AM鏀�鎸�