XC3S1200E-4FGG320C 鏅傞枔锛�2023/7/18 17:58:36 闁辫畝锛�422

鎻忚堪

XC3S1200E-4FGG320C鐝�(xi脿n)鍫村彲绶ㄧ▼闁€闄ｅ垪(FPGA)灏堢偤婊胯冻澶ф壒閲�銆佹垚鏈晱鎰熺殑娑堣不(f猫i)闆诲瓙鎳�(y墨ng)鐢ㄩ渶姹傝€岃ō(sh猫)瑷堛€傚閬�(d谩)376鍊婭/O寮曡叧鎴�156鍊嬪樊鍒嗕俊铏熷皪锛屾瘡鍊婭/O622+Mb/s鐨勬暩(sh霉)鎿�(j霉)鍌宠几鐜囧瘑搴﹂珮閬�(d谩)33,192鍊嬮倧杓柈鍏�锛屽寘鎷彲閬哥殑绉讳綅瀵勫瓨鍣ㄦ垨鍒嗗竷寮廟AM鏀寔锛岄倓鍏锋湁JTAG鐨勪綆鎴愭湰Xilinx?骞宠嚭闁冨瓨锛屽畬鍏ㄨ兘鍏煎32浣�/64浣�33MHzPCI鏀寔锛堟煇浜涜ō(sh猫)鍌欎腑鐐�66MHz锛�锛涚敱浜庢垚鏈サ浣庯紝XC3S1200E-4FGG320C闈炲父閬╁悎寤ｆ硾鐨勬秷璨�(f猫i)闆诲瓙鎳�(y墨ng)鐢�锛屽寘鎷甯舵帴鍏�銆佸搴恫(w菐ng)绲�(lu貌)銆侀’绀�/鎶曞奖鍜屾暩(sh霉)瀛楅浕瑕栬ō(sh猫)鍌�銆�

鐢�(ch菐n)鍝佹杩�

鐢�(ch菐n)鍝佸瀷铏�	XC3S1200E-4FGG320C
鎻忚堪	闆嗘垚闆昏矾FPGA 250 I / O 320FBGA
鍒嗛	闆嗘垚闆昏矾(IC)锛屽祵鍏ュ紡-FPGA(鐝�(xi脿n)鍫村彲绶ㄧ▼闁€闄ｅ垪)
鍒堕€犲晢	Xilinx鍏徃
绯诲垪	Spartan?-3E
鎵撳寘	鎵樼洡
闆诲-闆绘簮	1.14V?1.26V
宸ヤ綔婧害	0掳C?85掳C(TJ)
鍖呰/绠�	320-BGA
渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏寘瑁�	320-FBGA(19x19)
鍩烘湰闆朵欢铏�	XC3S1200E

鐢�(ch菐n)鍝佸湒鐗�

XC3S1200E-4FGG320C

瑕�(gu墨)鏍煎弮鏁�(sh霉)

鍒堕€犲晢鍖呰瑾槑	FBGA-320
绗﹀悎REACH	鏄�
绗﹀悎姝愮洘RoHS	鏄�
鐙€鎱�(t脿i)	娲绘€�
鍙法绋嬮倧杓鍨�	鐝�(xi脿n)鍫村彲绶ㄧ▼闁€闄ｅ垪
鏈€澶ф檪閻橀牷鐜�	572.0鍏嗚但
CLB-Max鐨勭祫鍚堝欢	0.76绱嶇
JESD-30浠ｇ⒓	S-PBGA-B320
JESD-609浠ｇ⒓	e1
CLB鏁�(sh霉)閲�	2168.0
绛夋晥闁€鏁�(sh霉)	1200000.0
杓稿叆鏁�(sh霉)閲�	250.0
閭忚集鍠厓鏁�(sh霉)	19512.0
杓稿嚭鏁�(sh霉)閲�	194.0
绔瓙鏁�(sh霉)	320
鏈€浣庡伐浣滄韩搴�	0鈩�
鏈€楂樺伐浣滄韩搴�	85鈩�
绲勭箶	2168 CLBS锛�1200000鍊嬮杸
鍖呰涓婚珨鏉愭枡	濉戞枡/鐠�(hu谩n)姘фü鑴�
鍖呰浠ｇ⒓	BGA
鍖呰绛夋晥浠ｇ⒓	BGA320,18X18,40
鍖呰褰㈢媭	鍥涙柟褰�
鍖呰褰㈠紡	缍�(w菐ng)鏍奸櫍鍒�
宄板€煎洖娴佹韩搴�(鈩�)	260
闆绘簮	1.2,1.2 / 3.3,2.5
搴ч珮	2.0姣背
瀛愰鍒�	鐝�(xi脿n)鍫村彲绶ㄧ▼闁€闄ｅ垪
闆绘簮闆诲妯�(bi膩o)绋�	1.2浼�
鏈€灏忎緵闆婚浕澹�	1.14浼�
鏈€澶ч浕婧愰浕澹�	1.26浼�
瀹夎椤炲瀷	琛ㄩ潰璨艰
鎶€琛�(sh霉)	CMOS
婧害绛夌礆	鍏朵粬
绲傜瀹屾垚	閷�/閵€/閵�(Sn95.5Ag4.0Cu0.5)
绲傜琛ㄦ牸	鐞�
绔瓙闁撹窛	1.0姣背
绲傜浣嶇疆	搴曢儴
鏅傞枔@宄板€煎洖娴佹韩搴�-鏈€澶у€�(绉�)	30
闀峰害	19.0姣背
瀵害	19.0姣背

鐠�(hu谩n)澧冭垏鍑哄彛鍒嗛

灞€�	鎻忚堪
REACH鐙€鎱�(t脿i)	REACH涓嶅彈褰遍熆
RoHS鐙€鎱�(t脿i)	绗﹀悎ROHS3
婵曟埃鏁忔劅搴�(MSL)	3(168灏忔檪)

鐗归粸(di菐n)

鎴愮啛鐨勫厛閫�(j矛n)90绱嶇背宸ヨ棟鎶€琛�(sh霉)
澶氶浕澹�锛屽妯�(bi膩o)婧�(zh菙n)SelectIO?鎺ュ彛寮曡叧
澶氶仈(d谩)376鍊婭/O寮曡叧鎴�156鍊嬪樊鍒嗕俊铏熷皪
LVCMOS锛孡VTTL锛孒STL鍜孲STL鍠淇¤櫉妯�(bi膩o)婧�(zh菙n)
3.3V锛�2.5V锛�1.8V锛�1.5V鍜�1.2V淇′护
姣忓€婭/O622+Mb/s鏁�(sh霉)鎿�(j霉)鍌宠几閫熺巼
鐪烲VDS锛孯SDS锛宮ini-LVDS锛屽樊鍒咹STL/SSTL宸垎I/O
澧炲挤(qi谩ng)鐨勯洐鍊嶆暩(sh霉)鎿�(j霉)閫熺巼(DDR)鏀寔
DDRSDRAM鏀寔楂橀仈(d谩)333Mb/s
璞愬瘜锛岄潏娲荤殑閭忚集璩囨簮
楂樻晥鐨勫寰�(f霉)鐢ㄥ櫒锛屽閭忚集
蹇€熸彁鍓嶉€�(j矛n)浣嶉倧杓�
甯舵湁鍙伕绠＄窔鐨勫寮�(qi谩ng)鍨�18x18涔樻硶鍣�
IEEE1149.1/1532JTAG绶ㄧ▼/瑾�(di脿o)瑭︾鍙�
鍒嗗堡SelectRAM?瀛樺劜鍣ㄦ灦妲�(g貌u)
楂橀仈(d谩)648Kbit鐨勫揩閫烞lockRAM
楂橀仈(d谩)231Kbit鐨勯珮鏁堝垎甯冨紡RAM
澶氶仈(d谩)鍏€嬫暩(sh霉)瀛楁檪閻樼鐞嗗櫒(DCM)
娑堥櫎鏅傞悩鍋忔枩(寤堕伈閹栧畾鐠�(hu谩n))
闋荤巼鍚堟垚锛屼箻娉�锛岄櫎娉�
楂樺垎杈ㄧ巼鐩哥Щ
瀵牷鐜囪寖鍦�(5MHz鑷�300MHz浠ヤ笂)
鑸囪妤�(y猫)妯�(bi膩o)婧�(zh菙n)PROM鐨勯厤缃帴鍙�
浣庢垚鏈�锛岀瘈(ji茅)鐪佺┖闁撶殑SPI涓茶闁冨瓨PROM
x8鎴杧8/x16骞惰NORFlashPROM
鍏锋湁JTAG鐨勪綆鎴愭湰Xilinx?骞宠嚭闁冨瓨
瀹屾暣鐨刋ilinxISE?鍜學ebPACK?杌熶欢
MicroBlaze?鍜孭icoBlaze?宓屽叆寮忚檿鐞嗗櫒鍏�(n猫i)鏍�
瀹屽叏鍏煎32-/64浣�33MHzPCI鏀寔(鏌愪簺瑷�(sh猫)鍌欑偤66MHz)
浣庢垚鏈琎FP鍜孊GA灏佽閬搁爡
閫氱敤灏佽鏀寔杓曟澗閫�(j矛n)琛屽瘑搴﹂伔绉�
鐒￠墰鍖呰閬告搰
鍏€嬪叏灞€鏅傞悩锛屾瘡鍊嬭ō(sh猫)鍌欐瘡鍗婂崐鍊嬪叓鍊嬮澶栨檪閻�锛屼互鍙婅睈瀵岀殑浣庡亸鏂滃竷绶�
瀵嗗害楂橀仈(d谩)33,192鍊嬮倧杓柈鍏�锛屽寘鎷彲閬哥殑绉讳綅瀵勫瓨鍣ㄦ垨鍒嗗竷寮廟AM鏀寔
閬╃敤浜庡ぇ閲忛潰鍚戞秷璨�(f猫i)鑰呯殑鎳�(y墨ng)鐢ㄧ殑瓒呬綆鎴愭湰楂樻€ц兘閭忚集瑙ｆ焙鏂规

CAD妯″瀷

XC3S1200E-4FGG320C绗﹁櫉

XC3S1200E-4FGG320C鑵冲嵃

鏇夸唬鍨嬭櫉

鍨嬭櫉	鍒堕€犲晢	鍝佸悕	鎻忚堪
XC3S1200E-4FG320I	璩介潏鎬�	FPGA鑺墖	1.2MGates 19512Cells 572MHz 90nm Technology 1.2V 320Pin FBGA
XC3S1200E-4FGG320I	璩介潏鎬�	FPGA鑺墖	2168CLBs 1200000Gates 572MHz 19512-Cell CMOS PBGA320
XC3S1200E-5FGG320C	璩介潏鎬�	FPGA鑺墖	1.2M Gates 19512 Cells 657MHz 90nm Technology 1.2V 320Pin FBGA