XC2C512-10FT256I 鏅傞枔锛�2023/7/12 11:37:44 闁辫畝锛�1222

鎻忚堪

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鐢�(ch菐n)鍝佸瀷铏�	XC2C512-10FT256I
鎻忚堪	闆嗘垚闆昏矾CPLD 512MC 9.2NS 256BGA
鍒嗛	闆嗘垚闆昏矾(IC)锛屽祵鍏ュ紡-CPLD(寰�(f霉)闆滅殑鍙法绋嬮倧杓ō(sh猫)鍌�)
鍒堕€犲晢	Xilinx鍏徃
绯诲垪	CoolRunner II
鎵撳寘	鎵樼洡
宸ヤ綔婧害	-40掳C?85掳C(TA)
鍖呰/绠�	256-LBGA
渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏寘瑁�	256-FTBGA(17x17)
鍩烘湰闆朵欢铏�	XC2C512

鐢�(ch菐n)鍝佸湒鐗�

XC2C512-10FT256I

瑕�(gu墨)鏍煎弮鏁�(sh霉)

鍒堕€犲晢鍖呰瑾槑	17 X 17 MM锛�1 MM闁撹窛锛屽鏂欙紝F(xi脿n)TBGA-256
绗﹀悎REACH	鏄�
鐙€鎱�(t脿i)	娲绘€�
鍙法绋嬮倧杓鍨�	闁冨瓨PLD
绯荤当(t菕ng)鍏�(n猫i)鍙法绋�	鏄�
JESD-30浠ｇ⒓	S-PBGA-B256
JESD-609浠ｇ⒓	00
JTAG BST	鏄�
灏堢敤杓稿叆鏁�(sh霉)	0.0
I / O绶氭暩(sh霉)	212.0
瀹忓柈鍏冩暩(sh霉)	512.0
绔瓙鏁�(sh霉)	256
鏈€浣庡伐浣滄韩搴�	-40鈩�
鏈€楂樺伐浣滄韩搴�	85鈩�
绲勭箶	0鍊嬪皥鐢ㄨ几鍏�锛�212 I / O
杓稿嚭鍔熻兘	瀹忚渹绐�
鍖呰涓婚珨鏉愭枡	濉戞枡/鐠�(hu谩n)姘фü鑴�
鍖呰浠ｇ⒓	LBGA
鍖呰绛夋晥浠ｇ⒓	鍖呰绛夋晥浠ｇ⒓
鍖呰褰㈠紡	缍�(w菐ng)鏍肩媭锛屼綆杓粨
宄板€煎洖娴佹韩搴�(鈩�)	240
闆绘簮	1.5 / 3.3,1.8
鍌虫挱寤堕伈	10.0绱嶇
搴ч珮	1.55姣背
瀛愰鍒�	鍙法绋嬮倧杓櫒浠�
闆绘簮闆诲妯�(bi膩o)绋�	1.8浼�
鏈€灏忎緵闆婚浕澹�	1.7浼�
鏈€澶ч浕婧愰浕澹�	1.9浼�
瀹夎椤炲瀷	琛ㄩ潰璨艰
鎶€琛�(sh霉)	CMOS
婧害绛夌礆	鐢�(ch菐n)妤�(y猫)
绲傜瀹屾垚	閷�/閴�(Sn63Pb37)
绲傜琛ㄦ牸	鐞�
绔瓙闁撹窛	1.0姣背
绲傜浣嶇疆	搴曢儴
鏅傞枔@宄板€煎洖娴佹韩搴�-鏈€澶у€�(绉�)	30
闀峰害	17.0姣背
瀵害	17.0姣背

鐠�(hu谩n)澧冭垏鍑哄彛鍒嗛

RoHS鐙€鎱�(t脿i)	绗﹀悎RoHS瑕�(gu墨)瀹�
姘村垎鏁忔劅鎬ф按骞�(MSL)	3(168灏忔檪)

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鈼忔キ(y猫)鐣屾渶浣崇殑0.18寰背CMOSCPLD

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銆傚叿鏈�173鍊嬬敤鎴禝/O鐨�208寮曡叧PQFP

銆傚叿鏈�212鍊嬬敤鎴禝/O鐨�256鐞僃T(1.0mm)BGA

銆傚叿鏈�270鍊嬬敤鎴禝/O鐨�324鐞僃G(1.0mm)BGA

銆傛墍鏈夊皝瑁濆潎鐒￠墰

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銆傚彲閬哥殑鏂藉瘑鐗硅Ц鐧�(f膩)鍣ㄨ几鍏�(姣忓€嬪紩鑵�)

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CAD妯″瀷

XC2C512-10FT256I绗﹁櫉

XC2C512-10FT256I鑵冲嵃

鏇夸唬鍨嬭櫉

鍨嬭櫉	鍒堕€犲晢	鍝佸悕	鎻忚堪
XC2C512-7FTG256C	璩介潏鎬�	CPLD鑺墖	12K Gates 512 Macro Cells 179MHz 0.18um (CMOS) 1.8V 256Pin
XC2C512-10FTG256I	璩介潏鎬�	CPLD鑺墖	12K Gates 512 Macro Cells 128MHz 0.18um (CMOS) 1.8V 256Pin