MKL25Z128VLK4 鏅傞枔锛�2023/7/11 11:36:58 闁辫畝锛�1167

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MKL25Z128VLK4鏄竴娆捐秴浣庡姛鑰楀井鎺у埗鍣�锛岄櫎浜咾inetis KL1x绯诲垪涔嬪锛岄倓澧炲姞浜嗕竴鍊嬪叏閫烾SB2.0On-the-Go(OTG)鎺у埗鍣ㄦ垨涓€鍊嬪叏閫熺劇鏅堕珨USB2.0瑷�(sh猫)鍌欐帶鍒跺櫒銆侹inetisKL2x寰帶鍒跺櫒绯诲垪鑸嘖inetisK20MCU锛堝熀浜嶢RM? Cortex?-M4锛変互鍙婃墍鏈夊叾浠朘inetis KL1x銆並L2x銆並L3x鍜孠L4x绯诲垪寰帶鍒跺櫒鍏煎锛屾彁渚涗簡鍚戞洿浣庡拰鏇撮珮鎬ц兘鍜屽姛鑳介泦鎴愮殑閬风Щ璺緫銆�

鐢�(ch菐n)鍝佹杩�

鐢�(ch菐n)鍝佸瀷铏�	MKL25Z128VLK4
鎻忚堪	IC MCU 32BIT 128KB闁冨瓨80FQFP
鍒嗛	闆嗘垚闆昏矾(IC)锛屽祵鍏ュ紡-寰帶鍒跺櫒
鍒堕€犲晢	鎭╂櫤娴﹀崐灏�(d菐o)楂�
绯诲垪	Kinetis KL2
闆诲-闆绘簮(Vcc / Vdd)	1.71V?3.6V
宸ヤ綔婧害	-40掳C?105掳C(TA)
鍖呰/绠�	80-LQFP
渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏寘瑁�	80-FQFP(12x12)
鍩烘湰闆朵欢铏�	MKL25Z128

鐢�(ch菐n)鍝佸湒鐗�

MKL25Z128VLK4

瑕�(gu墨)鏍煎弮鏁�(sh霉)

鐢�(ch菐n)鍝佺ó椤�	ARM寰帶鍒跺櫒-MCU
绯诲垪	KL2
闆朵欢鐙€鎱�(t脿i)	娲绘€�
鏍稿績铏曠悊鍣�	ARM?Cortex?-M0+
绋嬪簭瀛樺劜鍣ㄥぇ灏�	128KB
鏁�(sh霉)鎿�(j霉)绺界窔瀵害	32浣�
ADC鍒嗚鲸鐜�	16浣�
鏈€澶ф檪閻橀牷鐜�	48鍏嗚但
杓稿叆/杓稿嚭绔暩(sh霉)閲�	66鍊婭/O
鏁�(sh霉)鎿�(j霉)RAM澶у皬	16鍗冨瓧绡€(ji茅)
宸ヤ綔闆绘簮闆诲	3.3浼�
绋嬪簭瀛樺劜鍣ㄩ鍨�	Flash
鏁�(sh霉)鎿�(j霉)Ram椤炲瀷	SRAM
鎺ュ彛椤炲瀷	I2C锛孲PI锛孶ART
妯℃摤闆绘簮闆诲	3.3浼�
DAC鍒嗚鲸鐜�	12浣�
铏曠悊鍣ㄧ郴鍒�	KinetisL.
ADC閫氶亾鏁�(sh霉)	14
I2C閫氶亾鏁�(sh霉)	2鍊�
I/O鏁�(sh霉)閲�	66
鍙法绋婭/O鏁�(sh霉)閲�	66
PWM閫氶亾鏁�(sh霉)	6
SPI閫氶亾鏁�(sh霉)	2鍊�
瑷堟檪鍣�/瑷堟暩(sh霉)鍣ㄦ暩(sh霉)閲�	12
鎸暕鍣ㄩ鍨�	鍏�(n猫i)閮�
楂樺害	1.45姣背
闀峰害	12姣背
瀵害	12姣背
灏佽	鎵樼洡
瀹夎棰�(f膿ng)鏍�	璨肩墖/璨肩墖
灏佽/绠遍珨	LQFP-80

鐠�(hu谩n)澧冭垏鍑哄彛鍒嗛

RoHS鐙€鎱�(t脿i)	绗﹀悎ROHS3
姘村垎鏁忔劅鎬ф按骞�(MSL)	3(168灏忔檪)

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