鏍稿績锛欰RM Cortex-M0+
銆�銆�涓婚牷锛�48MHz
銆�銆�闁冨瓨锛�128KB
銆�銆�SRAM锛�16KB
銆�銆�灏佽�濓細LQFP-48
銆�銆�I/O寮曡叧鏁�(sh霉)锛�35
銆�銆�宸ヤ綔婧�搴﹁寖鍦嶏��-40掳C 鑷� +105掳C
銆�銆�闆绘簮闆诲�擄��1.71V 鑷� 3.6V

MKL16Z128VLH4R鐨勪富瑕佺壒鎬у寘鎷�锛�
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MKL16Z128VLH4R寤ｆ硾鎳�(y墨ng)鐢ㄤ簬浠ヤ笅闋�(l菒ng)鍩燂細
銆�銆�1. 娑堣不(f猫i)椤為浕瀛愯ō(sh猫)鍌�锛屼緥濡傚�剁敤闆诲��銆侀仚鎺у櫒鍜屼究鏀滃紡闆诲瓙鐢�(ch菐n)鍝�銆�
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MKL16Z64VLH4R, MKL16Z32VFM4R, MKL16Z128VMD4R