銆�銆�寤犲晢鍨嬭櫉锛欻C32F072KATA-LQFP64

銆�銆�鍝佺墝鍚嶇ū锛欻DSC(鑿�澶�)

銆�銆�鍏冧欢椤炲垾锛歁CU

銆�銆�灏佽�濊��(gu墨)鏍硷細LQFP-64

銆�銆�鍨嬭櫉浠嬬垂锛欳ortex-M0+鍏�(n猫i)鏍�

銆�銆�48MHz Cortex-M0+ 32 浣� CPU 骞宠嚭

銆�銆�HC32F072 绯诲垪鍏锋湁闈堟椿鐨勫姛鑰楃�＄悊绯荤��(t菕ng) ,浣庡姛鑰楁�ц兘锛�

銆�銆�鈥� 5渭A @ 3V娣卞害浼戠湢妯″紡 鎵�鏈夋檪閻橀棞(gu膩n)闁�锛屼笂闆诲京(f霉)浣嶆湁鏁堬紝 IO鐙�鎱�(t脿i)淇濇寔锛� IO涓�鏂锋湁鏁�锛屾墍鏈夊瘎瀛樺櫒銆� RAM鍜� CPU 鏁�(sh霉)鎿�(j霉)淇濆瓨鐙�鎱�(t脿i)鏅傜殑鍔熻��

銆�銆�鈥� 12渭A @32.768KHz浣庨�熷伐浣滄ā寮廋PU閬嬭��锛屽�栬��(sh猫)闂�(gu膩n)闁�锛屽緸 FLASH閬嬭�岀▼搴�

銆�銆�鈥� 40渭A/MHz@3V@24MHz浼戠湢妯″紡CPU 鍋滄��锛屽�栬��(sh猫)闂�(gu膩n)闁�锛屼富鏅傞悩閬嬭��

銆�銆�鈥� 140渭A/MHz@3V@24MHz宸ヤ綔妯″紡CPU閬嬭�岋紝澶栬��(sh猫)闂�(gu膩n)闁�锛屽緸 FLASH閬嬭�岀▼搴�

銆�銆�鈥� 4渭s鍠氶啋鏅傞枔 浣挎ā寮忓垏鎻涙洿鍔犻潏娲婚珮鏁堬紝绯荤当(t菕ng)鍙嶆噳(y墨ng)鏇寸偤鏁忔嵎

銆�銆�128K瀛楃瘈(ji茅) FLASH瀛樺劜鍣�锛屽叿鏈夋摝瀵�淇濊�峰姛鑳斤紝鏀�鎸� ISP銆� ICP銆� IAP

銆�銆�16K瀛楃瘈(ji茅) RAM瀛樺劜鍣�锛岄檮甯跺�囧伓鏍￠��锛屽�炲挤绯荤��(t菕ng)鐨勭┅(w臎n)瀹氭��

銆�銆�閫氱敤 I/O 绠¤叧 (86IO/100PIN,50IO/64PIN, 36IO/48PIN, 25IO/32PIN)

銆�銆�鏅傞悩銆佹櫠鎸�

銆�銆�鈥� 澶栭儴楂橀�熸櫠鎸� 4 ~ 32MHz

銆�銆�鈥� 澶栭儴浣庨�熸櫠鎸� 32.768KHz

銆�銆�鈥� 鍏�(n猫i)閮ㄩ珮閫熸檪閻� 4/8/16/22.12/24MHz

銆�銆�鈥� 鍏�(n猫i)閮ㄤ綆閫熸檪閻� 32.8/38.4KHz

銆�銆�鈥� PLL鏅傞悩 8 ~ 48MHz

銆�銆�鈥� 鍏�(n猫i)閮ㄩ珮閫� USB鏅傞悩 48MHz

銆�銆�鈥� 纭�浠舵敮鎸佸��(n猫i)澶栨檪閻樻牎婧栧拰鐩�(ji膩n)鎺�

銆�銆�瀹氭檪鍣� /瑷堟暩(sh霉)鍣�

銆�銆�鈥� 3鍊嬮�氱敤 16浣嶅畾鏅傚櫒锛屾敮鎸� 1绲勪簰瑁淧WM杓稿嚭锛屾敮鎸� 2鍊嶄富闋� PWM杓稿嚭锛屾渶楂樻敮鎸� 96MHz PWM杓稿嚭

銆�銆�鈥� 1鍊嬮珮绱� 16浣嶅畾鍒跺櫒锛屾敮鎸� 3鐩镐簰瑁淧WM杓稿嚭锛屾敮鎸� 2鍊嶄富闋� PWM杓稿嚭锛屾渶楂樻敮鎸� 96MHz PWM杓稿嚭

銆�銆�鈥� 3鍊嬮珮鎬ц兘 16浣嶅畾鏅傚櫒 /瑷堟暩(sh霉)鍣�锛屾敮鎸丳WM 浜掕�滐紝姝诲崁(q奴)淇濊�峰姛鑳�

銆�銆�鈥� 1鍊嬪彲绶ㄧ▼ 16浣嶅畾鏅傚櫒 PCA锛屾敮鎸� 5閫氶亾鎹曠嵅姣旇純锛� 5閫氶亾 PWM杓稿嚭

銆�銆�鈥� 1鍊� 20浣嶅彲绶ㄧ▼鐪嬮杸鐙楅浕璺�锛屽収(n猫i)寤哄皥鐢� 10KHz鎸�钑╁櫒鎻愪�� WDT 瑷堟暩(sh霉)