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GD80960JA33鏄竴娆剧敱GigaDevice鍏徃鐢熺敘(ch菐n)鐨勯珮鎬ц兘32浣嶅井鎺у埗鍣�(MCU)锛屽熀浜嶢RM Cortex-M4鍏�(n猫i)鏍�锛岄泦鎴愪簡璞愬瘜鐨勫瑷�(sh猫)鍜岄珮閫熻檿鐞嗚兘鍔�銆傝┎鑺墖寤ｆ硾鎳�(y墨ng)鐢ㄤ簬宸ユキ(y猫)鎺у埗銆侀浕姗�(j墨)椹�(q奴)鍕�(d貌ng)銆佹秷璨�(f猫i)闆诲瓙绛夐牁(l菒ng)鍩�锛屽叾鍗撹秺鐨勬€ц兘鍜屼綆鍔熻€楃壒鎬т娇鍏舵垚鐐虹溇澶氳ō(sh猫)瑷�(j矛)闋�(xi脿ng)鐩殑鐞嗘兂閬告搰銆�
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鍏�(n猫i)鏍革細ARM Cortex-M4
銆€銆€涓婚牷锛�180 MHz
銆€銆€闁冨瓨锛�512 KB
銆€銆€SRAM锛�128 KB
銆€銆€宸ヤ綔闆诲锛�1.7V~3.6V
銆€銆€婧害鑼冨湇锛�-40鈩儈+105鈩�
銆€銆€I/O寮曡叧鏁�(sh霉)锛�112
銆€銆€灏佽褰㈠紡锛歀QFP144

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