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EP4S40G2F40I3N鏄疉ltera锛堢従(xi脿n)宸茶Intel鏀惰臣锛夋帹鍑虹殑涓�娆惧熀浜嶴tratix IV绯诲垪鐨凢PGA鑺墖銆傝┎鑺墖閲囩敤鍏堥�茬殑40nm鍒堕�犲伐钘�锛屽叿鍌欓珮鎬ц兘銆佷綆鍔熻�楃殑鐗归粸锛岄仼鍚堢敤浜庡京闆滅殑鏁�(sh霉)瀛椾俊铏熻檿鐞�銆侀�氫俊绯荤当(t菕ng)銆佸湒鍍忚檿鐞嗕互鍙婂叾浠栭珮瑷堢畻闇�姹傜殑鎳夌敤鍫存櫙銆�
銆�銆�EP4S40G2F40I3N灞簬楂樼FPGA鐢㈠搧绶�锛屽叿鏈夎睈瀵岀殑閭忚集璩囨簮鍜屽祵鍏ュ紡瀛樺劜鍣ㄥ锛屽悓鏅傛敮鎸侀珮閫熸敹鐧�(f膩)鍣ㄥ姛鑳�锛屽彲浠ュ鐝�(xi脿n)楂橀仈8.5Gbps鐨勬暩(sh霉)鎿�(j霉)鍌宠几閫熺巼銆傛澶�锛屽畠閭勯泦鎴愪簡瑷卞灏堢敤纭牳妯″濡侾CIe鎺ュ彛鍜屾敮鎸佸绋覆琛屽崝(xi茅)璀扮殑鏀剁櫦(f膩)鍣�锛屼互绨″寲瑷▓骞舵彁鍗囨晥鐜�銆�
鍨嬭櫉锛欵P4S40G2F40I3N
銆�銆�绯诲垪锛歋tratix IV
銆�銆�鍒堕�犲伐钘濓細40nm
銆�銆�閰嶇疆瀛樺劜椤炲瀷锛欶lash
銆�銆�閭忚集鍠厓鏁�(sh霉)閲忥細绱�40K ALMs
銆�銆�鏈�澶х敤鎴禝/O寮曡叧鏁�(sh霉)锛�716
銆�銆�宓屽叆寮忓瓨鍎插櫒瀹归噺锛�29.3Mb
銆�銆�DSP妯″鏁�(sh霉)閲忥細576
銆�銆�鏀剁櫦(f膩)鍣ㄩ�氶亾鏁�(sh霉)閲忥細24
銆�銆�鏀剁櫦(f膩)鍣ㄩ�熺巼鑼冨湇锛�600Mbps - 8.5Gbps
銆�銆�渚涢浕闆诲鏍稿績锛�0.9V
銆�銆�渚涢浕闆诲I/O锛�1.5V / 1.8V / 2.5V / 3.3V
銆�銆�灏佽椤炲瀷锛欶BGA 1148
銆�銆�宸ヤ綔婧害鑼冨湇锛�-40掳C 鑷� +85掳C
EP4S40G2F40I3N鐨勪富瑕佺壒鎬у寘鎷互涓嬪咕榛烇細
銆�銆�1. 楂樻�ц兘閭忚集绲愭锛氬熀浜嶢LM锛圓daptive Logic Module锛夌殑鏋舵锛岃兘澶犻潏娲诲鐝�(xi脿n)鍚勭ó寰╅洔閭忚集鍔熻兘銆�
銆�銆�2. 澶ц(gu墨)妯￠泦鎴愶細鎻愪緵澶氶仈40K鍊婣LMs锛屾豢瓒冲京闆滅郴绲�(t菕ng)鐨勮ō瑷堥渶姹�銆�
銆�銆�3. 宓屽叆寮忓瓨鍎插櫒锛氬寘鍚ぇ閲廟AM濉婏紝绺藉閲忛仈鍒�29.3Mb锛岄仼鐢ㄤ簬鏁�(sh霉)鎿�(j霉)绶╁瓨鍜屾煡鎵捐〃绛夊姛鑳�銆�
銆�銆�4. DSP鍔熻兘锛氬収缃�576鍊嬮珮鎬ц兘DSP妯″锛屾敮鎸佷箻鍔犻亱绠�锛岄潪甯搁仼鍚堟暩(sh霉)瀛椾俊铏熻檿鐞嗕换鍕�銆�
銆�銆�5. 楂橀�熸敹鐧�(f膩)鍣細鏀寔24鍊嬬崹绔嬬殑鏀剁櫦(f膩)鍣ㄩ�氶亾锛屾瘡閫氶亾鏈�楂樺彲閬�8.5Gbps锛岄仼鍚堥珮閫熸暩(sh霉)鎿�(j霉)鍌宠几鎳夌敤銆�
銆�銆�6. 纭牳IP鏀寔锛氶泦鎴愭湁PCI Express纭牳妯″鍙婂叾浠栧父鐢ㄥ崝(xi茅)璀扮殑鏀寔锛屾笡灏戣粺鏍稿鐝�(xi脿n)甯朵締鐨勮硣婧愭秷鑰�銆�
銆�銆�7. Flash閰嶇疆锛氭敮鎸佺洿鎺ュ緸鍏ч儴Flash鍟熷嫊锛岀啊鍖栦簡閰嶇疆娴佺▼銆�
銆�銆�8. 鍙潬鎬ц垏浣庡姛鑰楋細閫氶亷鍎�(y艒u)鍖栬ō瑷堥檷浣庡嫊鎱�(t脿i)鍔熻�楀拰闈滄厠(t脿i)鍔熻��锛屽悓鏅備繚璀夌郴绲�(t菕ng)鐨勭┅(w臎n)瀹氶亱琛�銆�
EP4S40G2F40I3N寤ｆ硾鎳夌敤浜庨渶瑕侀珮鎬ц兘瑷堢畻鍜屽京闆滈倧杓檿鐞嗙殑闋樺煙锛屽吀鍨嬫噳鐢ㄥ牬鏅寘鎷細
銆�銆�1. 閫氫俊瑷倷锛氬璺敱鍣�銆佷氦鎻涙涓殑鏁�(sh霉)鎿�(j霉)鍖呰檿鐞嗗拰娴侀噺绠＄悊銆�
銆�銆�2. 瑕栭牷鑸囧湒鍍忚檿鐞嗭細瑕栭牷绶ㄧ⒓瑙ｇ⒓銆佸湒鍍忓寮峰強瀵︽檪鍒嗘瀽銆�
銆�銆�3. 宸ユキ(y猫)鑷嫊鍖栵細閬嬪嫊鎺у埗銆佹鍣ㄨ瑕虹瓑灏嶅鏅傛�у拰绮惧害瑕佹眰杓冮珮鐨勫牬鍚�銆�
銆�銆�4. 閱�(y墨)鐧傝ō鍌欙細瓒呰伈娉㈡垚鍍忋�丆T鎺冩弿绛夐啱(y墨)鐧傚奖鍍忚檿鐞嗙郴绲�(t菕ng)銆�
銆�銆�5. 娓│娓噺锛氶珮閫熸暩(sh霉)鎿�(j霉)閲囬泦鍜屼俊铏熺敓鎴�銆�
銆�銆�6. 杌嶄簨鑸囪埅澶╋細闆烽仈淇¤櫉铏曠悊銆佽(w猫i)鏄熼�氫俊绛夐牁鍩熴��
銆�銆�7. 鏁�(sh霉)鎿�(j霉)涓績锛氬姞閫熻▓绠�銆佹暩(sh霉)鎿�(j霉)澹撶府鍜屽姞瀵嗚檿鐞嗐��
銆�銆�鍏跺挤澶х殑閭忚集璩囨簮鍜岄珮閫熸帴鍙ｈ兘鍔涗娇鍏舵垚鐐洪�欎簺闋樺煙鐨勭悊鎯抽伕鎿�銆�
EP4S60F40I3, EP4S230F40I3
