鏅傞枔锛�2025/4/29 18:41:56
闁辫畝锛�35
EP3C10F256C6N 鏄� Altera 鍏徃锛堢従(xi脿n)宸茶 Intel 鏀惰臣锛夋帹鍑虹殑涓�娆� Cyclone III 绯诲垪 FPGA 鑺墖銆傝┎绯诲垪鑺墖涓昏瀹氫綅浜庝綆鎴愭湰銆侀珮鎬ц兘鐨勬噳鐢ㄥ牬鏅�锛屽唬娉涚敤浜庨�氫俊銆佸伐妤�(y猫)鎺у埗銆佹秷璨婚浕瀛愬拰姹借粖闆诲瓙绛夐牁鍩�銆侲P3C10F256C6N 鎻愪緵浜嗚睈瀵岀殑閭忚集璩囨簮銆佹暩(sh霉)瀛椾俊铏熻檿鐞嗚兘鍔涗互鍙婂绋帴鍙ｉ伕闋�锛岄仼鍚堥渶瑕侀潏娲昏ō瑷堝拰蹇�熶笂甯傜殑闋呯洰銆�
銆�銆�閫欐 FPGA 鍩轰簬 65nm 宸ヨ棟鍒堕��锛屽叿鏈夎純浣庣殑鍔熻�楀拰杓冮珮鐨勬�ц兘瀵嗗害锛屾敮鎸侀厤缃偤澶氱ó寰╅洔閭忚集闆昏矾銆傛澶栵紝Cyclone III 绯诲垪閭勫叿鍌欏祵鍏ュ紡瀛樺劜鍣ㄥ銆佷箻娉曞櫒浠ュ強 PLL 绛夐棞閸电壒鎬э紝閫蹭竴姝ュ寮蜂簡鍏跺湪鐝�(xi脿n)浠ｆ暩(sh霉)瀛楃郴绲�(t菕ng)涓殑閬╃敤鎬�銆�
鍨嬭櫉锛欵P3C10F256C6N
銆�銆�鍝佺墝锛欰ltera (Intel)
銆�銆�绯诲垪锛欳yclone III
銆�銆�宸ヨ棟锛�65nm
銆�銆�閭忚集鍠厓鏁�(sh霉)閲忥細澶х磩 10,416 鍊�
銆�銆�RAM 璩囨簮锛氱磩 119.75Kb
銆�銆�DSP 妯″鏁�(sh霉)閲忥細32 鍊�
銆�銆�I/O 寮曡叧鏁�(sh霉)閲忥細192 鍊�
銆�銆�宸ヤ綔闆诲锛氭牳蹇冮浕澹� 1.2V锛孖/O 闆诲鍙伕 1.2V/1.5V/1.8V/2.5V/3.3V
銆�銆�灏佽褰㈠紡锛欶BGA256
銆�銆�閫熷害绛夌礆锛�-6
銆�銆�婧害鑼冨湇锛氬伐妤�(y猫)绱� -40掳C 鑷� +85掳C
EP3C10F256C6N 鐨勪富瑕佺壒鎬у寘鎷細
銆�銆�1. 楂樻�ц兘閭忚集绲愭锛氬熀浜庤嚜閬╂噳閭忚集妯″锛圓LM锛�锛屾彁渚涗簡鏇撮珮鏁堢殑閭忚集瀵︾従(xi脿n)鏂瑰紡銆�
銆�銆�2. 鍏х疆纭牳涔樻硶鍣細鍖呭惈澶氶仈 32 鍊� 9x9 浣嶇‖鏍镐箻娉曞櫒锛岄仼鐢ㄤ簬 DSP 鎳夌敤銆�
銆�銆�3. 澶у閲忓祵鍏ュ紡瀛樺劜鍣細鏀寔楂橀仈 119.75Kb 鐨� M4K 瀛樺劜濉�锛屽彲鐢ㄤ簬 FIFO 鎴栨煡鎵捐〃绛夋噳鐢�銆�
銆�銆�4. 鍙法绋嬫檪閻樼鐞嗭細闆嗘垚浜嗛帠鐩哥挵(hu谩n)锛圥LL锛夛紝鑳藉鐢熸垚鍜屽垎闋诲绋牷鐜囦俊铏�銆�
銆�銆�5. 澶氱ó I/O 妯欐簴鏀寔锛氬吋瀹� LVCMOS銆丩VDS銆丼STL 绛夊父瑕嬫婧�锛屾豢瓒充笉鍚屾帴鍙ｉ渶姹傘��
銆�銆�6. 鍏ч儴閰嶇疆閬搁爡锛氭敮鎸佷富鍕曚覆琛岋紙AS锛�銆佽鍕曚覆琛岋紙PS锛夌瓑澶氱ó閰嶇疆妯″紡銆�
銆�銆�7. 浣庡姛鑰楀劒(y艒u)鍖栵細閲囩敤 Stratix II 鍜� Cyclone II 鐨勪綆鍔熻�楁妧琛�锛屾湁鏁堥檷浣庨潨鎱�(t脿i)鍜屽嫊鎱�(t脿i)鍔熻��銆�
EP3C10F256C6N 寤ｆ硾鎳夌敤浜庝互涓嬮牁鍩燂細
銆�銆�1. 鏁�(sh霉)瀛椾俊铏熻檿鐞嗭細濡傞煶闋汇�佽闋荤法瑙ｇ⒓鍜屾烤娉㈠櫒瑷▓銆�
銆�銆�2. 宸ユキ(y猫)鑷嫊鍖栵細濡� PLC 鎺у埗鍣�銆侀亱鍕曟帶鍒跺拰鍌虫劅鍣ㄦ暩(sh霉)鎿�(j霉)閲囬泦銆�
銆�銆�3. 閫氫俊瑷倷锛氬鍩哄付铏曠悊鍣�銆佸崝(xi茅)璀拌綁鎻涘櫒鍜岀恫绲℃帴鍙ｅ崱銆�
銆�銆�4. 娑堣不闆诲瓙鐢㈠搧锛氬楂樻竻闆昏銆佹闋傜洅鍜屾父鎴叉銆�
銆�銆�5. 閱�(y墨)鐧傝ō鍌欙細濡傝秴鑱叉垚鍍�銆佺洠(ji膩n)璀峰剙鍜岃ê鏂峰剙鍣ㄣ��
銆�銆�6. 姹借粖闆诲瓙锛氬楂樼礆椐曢杓斿姪绯荤当(t菕ng)锛圓DAS锛夊拰杌婅級淇℃伅濞涙▊绯荤当(t菕ng)銆�
銆�銆�鐢变簬鍏堕潏娲绘�у拰楂樻�ц兘锛孍P3C10F256C6N 鎴愮偤瑷卞涓皬鍨� FPGA 鎳夌敤鐨勭悊鎯抽伕鎿囥��
EP3C10E256C6N
銆�銆�EP3C10F256I6N
