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銆€銆€鍝佺墝锛欰ltera (Intel FPGA)
銆€銆€绯诲垪锛歋tratix II GX
銆€銆€閭忚集鍠厓鏁�(sh霉)閲忥細绱� 45,000 ALMs
銆€銆€DSP 妯″鏁�(sh霉)閲忥細360
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銆€銆€PLL 鏁�(sh霉)閲忥細8
銆€銆€宸ヤ綔闆诲锛氭牳蹇冮浕澹� 1.2V锛孖/O 闆诲 1.8V/2.5V/3.3V
銆€銆€灏佽椤炲瀷锛欶BGA 1080
銆€銆€宸ヤ綔婧害鑼冨湇锛�-40掳C 鑷� +85掳C

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