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鐢�(ch菐n)鍝佸瀷铏�	EP1SGX40DF1020I6N
鎻忚堪	IC FPGA 624 I/O 1020FBGA
鍒嗛	闆嗘垚闆昏矾(IC)锛屽祵鍏ュ紡-FPGA(鐝�(xi脿n)鍫村彲绶ㄧ▼闁€闄ｅ垪)
鍒堕€犲晢	鑻辩壒鐖�
绯诲垪	Stratix?GX
鎵撳寘	鎵樼洡
闆朵欢鐙€鎱�(t脿i)	閬庢檪鐨�
闆诲-闆绘簮	1.425V?1.575V
宸ヤ綔婧害	-40掳C?100掳C(TJ)
鍖呰/绠�	1020-BBGA
渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏寘瑁�	1020-FBGA(33x33)
鍩烘湰闆朵欢铏�	EP1SGX40

鐢�(ch菐n)鍝佸湒鐗�

EP1SGX40DF1020I6N

瑕�(gu墨)鏍煎弮鏁�(sh霉)

鍙法绋嬮倧杓鍨�	鐝�(xi脿n)鍫村彲绶ㄧ▼闁€闄ｅ垪
绗﹀悎姝愮洘RoHS	鏄�
鐙€鎱�(t脿i)	杞�(zhu菐n)鍏�
JESD-30浠ｇ⒓	S-PBGA-B1020
绺絉AM浣�	3423744
CLB鏁�(sh霉)閲�	4697.0
杓稿叆鏁�(sh霉)閲�	624.0
閭忚集鍠厓鏁�(sh霉)	41250.0
杓稿嚭鏁�(sh霉)閲�	624.0
绔瓙鏁�(sh霉)	1020
鏈€浣庡伐浣滄韩搴�	-65鈩�
鏈€楂樺伐浣滄韩搴�	135鈩�
绲勭箶	4697 CLBS
宄板€煎洖娴佹韩搴�(鈩�)	245
闆绘簮	1.5,1.5 / 3.3
璩囨牸鐙€鎱�(t脿i)	涓嶅悎鏍�
搴ч珮	3.5姣背
瀛愰鍒�	鐝�(xi脿n)鍫村彲绶ㄧ▼闁€闄ｅ垪
闆绘簮闆诲妯欑ū	1.5浼�
鏈€灏忎緵闆婚浕澹�	1.425浼�
鏈€澶ч浕婧愰浕澹�	1.575浼�
瀹夎椤炲瀷	琛ㄩ潰璨艰
鎶€琛�(sh霉)	CMOS
婧害绛夌礆	杌嶄簨
绲傜瀹屾垚	閷�/閵€/閵�(Sn / Ag / Cu)
绲傜琛ㄦ牸	鐞�
绔瓙闁撹窛	1.0姣背
绲傜浣嶇疆	搴曢儴
鏅傞枔@宄板€煎洖娴佹韩搴︽渶澶у€�(绉�)	40
闀峰害	33.0姣背
瀵害	33.0姣背
鍖呰涓婚珨鏉愭枡	濉戞枡/鐠�(hu谩n)姘фü鑴�
鍖呰浠ｇ⒓	BGA
鍖呰绛夋晥浠ｇ⒓	BGA1020,32X32,40
鍖呰褰㈢媭	寤ｅ牬
鍖呰褰㈠紡	缍�(w菐ng)鏍奸櫍鍒�
鍒堕€犲晢鍖呰瑾槑	33 X 33 MM锛�1 MM闁撹窛锛岀劇閴涳紝F(xi脿n)BGA-1020

鐠�(hu谩n)澧冭垏鍑哄彛鍒嗛

鐒￠墰鐙€鎱�(t脿i)	鐒￠墰
姘村垎鏁忔劅鎬ф按骞�(MSL)	3(168灏忔檪)

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鈻犳敹鐧�(f膩)鍣ㄦā濉婂姛鑳藉涓嬶細

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閫氶亾缍佸畾绗﹀悎IEEE 802.3ae(鍍呴仼鐢ㄤ簬XAUI妯″紡)
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10570鑷�41250鍊嬮倧杓厓绱�(LE)
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