鎮ㄥソ锛屾杩庝締鍒扮董搴浕瀛愬競鍫寸恫(w菐ng)
鐧婚寗 | 鍏嶈不(f猫i)娉ㄥ唺
鏅傞枔锛�2023/7/18 18:43:49
闁辫畝锛�675
鐢�(ch菐n)鍝佸瀷铏� | AD9739BBCZ |
鎻忚堪 | 闆嗘垚闆昏矾DAC 14BIT A-OUT 160CSPBGA |
鍒嗛 | 闆嗘垚闆昏矾(IC)锛屾暩(sh霉)鎿�(j霉)閲囬泦-鏁�(sh霉)妯¤綁(zhu菐n)鎻涘櫒(DAC) |
鍒堕�犲晢 | ADI鍏徃 |
鎵撳寘 | 鎵樼洡 |
闆朵欢鐙�鎱�(t脿i) | 娲绘�� |
闆诲-闆绘簮锛屾ā鎿� | 1.7V?1.9V锛�3.1V?3.5V |
闆诲-闆绘簮锛屾暩(sh霉)瀛� | 1.7V?1.9V锛�3.1V?3.5V |
宸ヤ綔婧害 | -40掳C?85掳C |
鍖呰/绠� | 160-LFBGA锛孋SPBGA |
渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏寘瑁� | 160-CSPBGA(12x12) |
鍩烘湰闆朵欢铏� | AD9739 |
AD9739BBCZ
鍒堕�犲晢鍖呰瑾槑 | BGA-160 |
绗﹀悎REACH | 鏄� |
绗﹀悎姝愮洘RoHS | 鏄� |
绗﹀悎涓湅RoHS | 鏄� |
鐙�鎱�(t脿i) | 娲绘�� |
杞�(zhu菐n)鎻涘櫒椤炲瀷 | D / A杞�(zhu菐n)鎻涘櫒 |
妯℃摤杓稿嚭闆诲-鏈�灏忓�� | -1.0 V |
妯℃摤杓稿嚭鏈�澶ч浕澹� | 1.0浼� |
杓稿叆浣嶇⒓ | 浜岄��(j矛n)鍒� |
杓稿叆鏍煎紡 | 涓茶锛屽苟琛岋紝瀛� |
JESD-30浠ｇ⒓ | S-PBGA-B160 |
JESD-609浠ｇ⒓ | e1 |
浣嶆暩(sh霉) | 14 |
鍔熻兘鏁�(sh霉)閲� | 1鍊� |
绔瓙鏁�(sh霉) | 160 |
绲�(ji茅)妲�(g貌u) | 鍥涜矾闁嬮棞(gu膩n) |
鏈�浣庡伐浣滄韩搴� | -40鈩� |
鏈�楂樺伐浣滄韩搴� | 85鈩� |
鏈�澶ч浕婧愰浕娴� | 238.0姣畨 |
闆绘簮闆诲妯�(bi膩o)绋� | 3.3浼� |
鍖呰涓婚珨鏉愭枡 | 濉戞枡/鐠�(hu谩n)姘фü鑴� |
鍖呰浠ｇ⒓ | LFBGA |
鍖呰绛夋晥浠ｇ⒓ | BGA160,14X14,32 |
鍖呰褰㈢媭 | 鍥涙柟褰� |
鍖呰褰㈠紡 | 缍�(w菐ng)鏍肩媭锛屼綆杓粨锛岀簿绱�(x矛)闁撹窛 |
搴ч珮 | 1.4姣背 |
瀛愰鍒� | 鍏朵粬杞�(zhu菐n)鎻涘櫒 |
瀹夎椤炲瀷 | 琛ㄩ潰璨艰 |
鎶�琛�(sh霉) | CMOS |
婧害绛夌礆 | 鐢�(ch菐n)妤�(y猫) |
绲傜瀹屾垚 | 閷�/閵�/閵�(Sn96.5Ag3.0Cu0.5) |
绲傜琛ㄦ牸 | 鐞� |
绔瓙闁撹窛 | 0.8姣背 |
绲傜浣嶇疆 | 搴曢儴 |
闀峰害 | 12.0姣背 |
瀵害 | 12.0姣背 |
RoHS鐙�鎱�(t脿i) | 绗﹀悎ROHS3 |
姘村垎鏁忔劅鎬ф按骞�(MSL) | 3(168灏忔檪) |
鐩存帴RF闋荤巼鍚堟垚(2.5GSPS鏇存柊閫熺巼)
鐩存祦鑷�1.25GHz(鍩哄付妯″紡)
1.25GHz鑷�3.0GHz(娣烽牷妯″紡)
妤�(y猫)鐣岄牁(l菒ng)鍏堢殑鍠�/澶氳級娉F鎴朢F鍚堟垚
fOUT=350MHz锛孉CLR=80dBc
fOUT=950MHz锛孉CLR=78dBc
fOUT=2100MHz锛孉CLR=69dBc
闆欑鍙VDS鏁�(sh霉)鎿�(j霉)鎺ュ彛
宸ヤ綔閫熺巼楂橀仈(d谩)1.25GSPS
婧愬悓姝DR鏅傞悩
鑸嘇D9739A寮曡叧鍏煎
澶氳姱鐗囧悓姝ヨ兘鍔�
鍙法绋嬭几鍑洪浕娴侊細8.7mA鑷�31.7mA
浣庡姛鑰楋細1.16W(2.5GSPS)
瀵付閫氫俊绯荤当(t菕ng)
杌嶇敤骞叉摼鐧�(f膩)灏勫櫒
鍎�鍣ㄥ剙琛�銆佽嚜鍕曟脯瑭﹁ō(sh猫)鍌�
闆烽仈(d谩)銆佽埅绌洪浕瀛�
AD9739BBCZ绗﹁櫉
AD9739BBCZ鑵冲嵃
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